linux.git/arch/arm/kernel/debug.S, branch v6.12.80

ARM: 9005/1: debug: Select flow control for all debug UARTs

2020-09-15T13:35:28+00:00

Instead of a flow control selection mechanism specifically for
8250, make this available for all debug UARTs. If the debug
UART supports waiting for CTS to be asserted, then this code
can be activated for terminals that need it.

We keep the defaults for EBSA110, Footbridge, Gemini and RPC
so that this still works as expected for these older platforms:
they assume that flow control shall be enabled for debug
prints.

I switch the location of the check for
ifdef CONFIG_DEBUG_UART_FLOW_CONTROL from the actual debug
UART drivers: the code would get compiled-out for 8250 and
Tegra unless their custom config (or passing -DFLOW_CONTROL
in the Tegra case) was not set. Instead this is conditional
at the three places where we print debug messages. The idea
is that debug UARTs can be implemented without this ifdef
boilerplate so they look cleaner, alas the ifdef has to be
somewhere.

Signed-off-by: Linus Walleij 
Signed-off-by: Russell King

ARM: 9004/1: debug: Split waituart to CTS and TXRDY

2020-09-15T13:35:27+00:00

This patch was triggered by a remark from Russell that
introducing a call to the waituart (needed to fix debug prints
on the Qualcomm platforms) was dangerous because in some cases
this will involve waiting for a modem CTS (clear to send)
signal, and debug messages would maybe not work on platforms
with no modem connected to the UART port: they will just
hang waiting for the modem to assert CTS and this might never
happen.

Looking through all UART debug drivers implementing the waituart
macro I discovered that all users except two actually use this
macro to check if the UART is ready for TX, let's call this
TXRDY.

Only two debug UART drivers actually check for CTS:
- arch/arm/include/debug/8250.S
- arch/arm/include/debug/tegra.S

The former is very significant since the 8250 is possibly
the most common UART on the planet.

We have the following problem: the semantics of waituart are
ambiguous making it dangerous to introduce the macro to debug
code fixing debug prints for Qualcomm. To start to pry this
problem apart, this patch does the following:

- Convert all debug UART drivers to define two macros:

  - waituartcts with the clear semantic to wait for CTS
    to be asserted

  - waituarttxrdy with the clear semantic to wait for the TX
    capability of the UART to be ready

- When doing this take care to assign the right function to
  each drivers macro, so they now do exactly the above.

- Update the three sites in the kernel invoking the waituart
  macro to call waituartcts/waituarttxrdy in sequence, so that
  the functional impact on the kernel should be zero.

After this we can start to change the code sites using this
code to do the right thing.

Signed-off-by: Linus Walleij 
Signed-off-by: Russell King

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19T15:09:55+00:00

Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner 
Reviewed-by: Enrico Weigelt 
Reviewed-by: Kate Stewart 
Reviewed-by: Allison Randal 
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman

ARM: 8844/1: use unified assembler in assembly files

2019-02-26T11:26:07+00:00

Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.

Signed-off-by: Stefan Agner 
Acked-by: Nicolas Pitre 
Signed-off-by: Russell King

Merge branches 'fixes', 'misc' and 'sa1111-for-next' into for-next

2017-11-08T19:42:43+00:00

ARM: 8717/2: debug printch/printascii: translate '\n' to "\r\n" not "\n\r"

2017-11-06T11:58:16+00:00

Some terminals apparently have issues with "\n\r" and mess up the
display. Let's use the traditional "\r\n" ordering.

Signed-off-by: Nicolas Pitre 
Reported-by: Chris Brandt 
Tested-by: Chris Brandt 
Signed-off-by: Russell King

ARM: 8704/1: semihosting: use proper instruction on v7m processors

2017-10-12T10:28:29+00:00

The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.

Signed-off-by: Nicolas Pitre 
Signed-off-by: Russell King

ARM: 8703/1: debug.S: move hexbuf to a writable section

2017-10-12T10:26:21+00:00

This was located in .text which is meant to be read-only. And in the XIP
case this shortcut simply doesn't work and may trigger a Flash controller
mode switch and crash the kernel. Move it to the .bss area.

Signed-off-by: Nicolas Pitre 
Signed-off-by: Russell King

ARM: unify MMU/!MMU addruart calls

2015-05-20T21:09:51+00:00

Remove the needless differences between MMU/!MMU addruart calls.
This allows to use the same addruart macro on SoC level. Useful
for SoC consisting of multiple CPUs with and without MMU such as
Freescale Vybrid.

Signed-off-by: Stefan Agner 
Signed-off-by: Arnd Bergmann

ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

2014-07-18T11:29:04+00:00

ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon 
Tested-by: Stephen Warren  # Tegra Jetson TK1
Tested-by: Robert Jarzmik  # mioa701_bootresume.S
Tested-by: Andrew Lunn  # Kirkwood
Tested-by: Shawn Guo 
Tested-by: Tony Lindgren  # OMAPs
Tested-by: Gregory CLEMENT  # Armada XP, 375, 385
Acked-by: Sekhar Nori  # DaVinci
Acked-by: Christoffer Dall  # kvm/hyp
Acked-by: Haojian Zhuang  # PXA3xx
Acked-by: Stefano Stabellini  # Xen
Tested-by: Uwe Kleine-König  # ARMv7M
Tested-by: Simon Horman  # Shmobile
Signed-off-by: Russell King