<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/arm/kernel/perf_event_cpu.c, branch v3.16.81</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>ARM: 8149/1: perf: Don't sleep while atomic when enabling per-cpu interrupts</title>
<updated>2014-10-05T20:41:02+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-09-11T22:25:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=43f51ede5c6b99b34cfdc42c6e198df28f621c70'/>
<id>43f51ede5c6b99b34cfdc42c6e198df28f621c70</id>
<content type='text'>
commit 505013bc9065391f09a51d51cd3bf0b06dfb570a upstream.

Rob Clark reports a sleeping while atomic bug when using perf.

BUG: sleeping function called from invalid context at ../kernel/locking/mutex.c:583
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
------------[ cut here ]------------
WARNING: CPU: 2 PID: 4828 at ../kernel/locking/mutex.c:479 mutex_lock_nested+0x3a0/0x3e8()
DEBUG_LOCKS_WARN_ON(in_interrupt())
Modules linked in:
CPU: 2 PID: 4828 Comm: Xorg.bin Tainted: G        W      3.17.0-rc3-00234-gd535c45-dirty #819
[&lt;c0216690&gt;] (unwind_backtrace) from [&lt;c0212174&gt;] (show_stack+0x10/0x14)
[&lt;c0212174&gt;] (show_stack) from [&lt;c0867cc0&gt;] (dump_stack+0x98/0xb8)
[&lt;c0867cc0&gt;] (dump_stack) from [&lt;c02492a4&gt;] (warn_slowpath_common+0x70/0x8c)
[&lt;c02492a4&gt;] (warn_slowpath_common) from [&lt;c02492f0&gt;] (warn_slowpath_fmt+0x30/0x40)
[&lt;c02492f0&gt;] (warn_slowpath_fmt) from [&lt;c086a3f8&gt;] (mutex_lock_nested+0x3a0/0x3e8)
[&lt;c086a3f8&gt;] (mutex_lock_nested) from [&lt;c0294d08&gt;] (irq_find_host+0x20/0x9c)
[&lt;c0294d08&gt;] (irq_find_host) from [&lt;c0769d50&gt;] (of_irq_get+0x28/0x48)
[&lt;c0769d50&gt;] (of_irq_get) from [&lt;c057d104&gt;] (platform_get_irq+0x1c/0x8c)
[&lt;c057d104&gt;] (platform_get_irq) from [&lt;c021a06c&gt;] (cpu_pmu_enable_percpu_irq+0x14/0x38)
[&lt;c021a06c&gt;] (cpu_pmu_enable_percpu_irq) from [&lt;c02b1634&gt;] (flush_smp_call_function_queue+0x88/0x178)
[&lt;c02b1634&gt;] (flush_smp_call_function_queue) from [&lt;c0214dc0&gt;] (handle_IPI+0x88/0x160)
[&lt;c0214dc0&gt;] (handle_IPI) from [&lt;c0208930&gt;] (gic_handle_irq+0x64/0x68)
[&lt;c0208930&gt;] (gic_handle_irq) from [&lt;c0212d04&gt;] (__irq_svc+0x44/0x5c)
Exception stack(0xe63ddea0 to 0xe63ddee8)
dea0: 00000001 00000001 00000000 c2f3b200 c16db380 c032d4a0 e63ddf40 60010013
dec0: 00000000 001fbfd4 00000100 00000000 00000001 e63ddee8 c0284770 c02a2e30
dee0: 20010013 ffffffff
[&lt;c0212d04&gt;] (__irq_svc) from [&lt;c02a2e30&gt;] (ktime_get_ts64+0x1c8/0x200)
[&lt;c02a2e30&gt;] (ktime_get_ts64) from [&lt;c032d4a0&gt;] (poll_select_set_timeout+0x60/0xa8)
[&lt;c032d4a0&gt;] (poll_select_set_timeout) from [&lt;c032df64&gt;] (SyS_select+0xa8/0x118)
[&lt;c032df64&gt;] (SyS_select) from [&lt;c020e8e0&gt;] (ret_fast_syscall+0x0/0x48)
---[ end trace 0bb583b46342da6f ]---
INFO: lockdep is turned off.

We don't really need to get the platform irq again when we're
enabling or disabling the per-cpu irq. Furthermore, we don't
really need to set and clear bits in the active_irqs bitmask
because that's only used in the non-percpu irq case to figure out
when the last CPU PMU has been disabled. Just pass the irq
directly to the enable/disable functions to clean all this up.
This should be slightly more efficient and also fix the
scheduling while atomic bug.

Fixes: bbd64559376f "ARM: perf: support percpu irqs for the CPU PMU"

Reported-by: Rob Clark &lt;robdclark@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
commit 505013bc9065391f09a51d51cd3bf0b06dfb570a upstream.

Rob Clark reports a sleeping while atomic bug when using perf.

BUG: sleeping function called from invalid context at ../kernel/locking/mutex.c:583
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
------------[ cut here ]------------
WARNING: CPU: 2 PID: 4828 at ../kernel/locking/mutex.c:479 mutex_lock_nested+0x3a0/0x3e8()
DEBUG_LOCKS_WARN_ON(in_interrupt())
Modules linked in:
CPU: 2 PID: 4828 Comm: Xorg.bin Tainted: G        W      3.17.0-rc3-00234-gd535c45-dirty #819
[&lt;c0216690&gt;] (unwind_backtrace) from [&lt;c0212174&gt;] (show_stack+0x10/0x14)
[&lt;c0212174&gt;] (show_stack) from [&lt;c0867cc0&gt;] (dump_stack+0x98/0xb8)
[&lt;c0867cc0&gt;] (dump_stack) from [&lt;c02492a4&gt;] (warn_slowpath_common+0x70/0x8c)
[&lt;c02492a4&gt;] (warn_slowpath_common) from [&lt;c02492f0&gt;] (warn_slowpath_fmt+0x30/0x40)
[&lt;c02492f0&gt;] (warn_slowpath_fmt) from [&lt;c086a3f8&gt;] (mutex_lock_nested+0x3a0/0x3e8)
[&lt;c086a3f8&gt;] (mutex_lock_nested) from [&lt;c0294d08&gt;] (irq_find_host+0x20/0x9c)
[&lt;c0294d08&gt;] (irq_find_host) from [&lt;c0769d50&gt;] (of_irq_get+0x28/0x48)
[&lt;c0769d50&gt;] (of_irq_get) from [&lt;c057d104&gt;] (platform_get_irq+0x1c/0x8c)
[&lt;c057d104&gt;] (platform_get_irq) from [&lt;c021a06c&gt;] (cpu_pmu_enable_percpu_irq+0x14/0x38)
[&lt;c021a06c&gt;] (cpu_pmu_enable_percpu_irq) from [&lt;c02b1634&gt;] (flush_smp_call_function_queue+0x88/0x178)
[&lt;c02b1634&gt;] (flush_smp_call_function_queue) from [&lt;c0214dc0&gt;] (handle_IPI+0x88/0x160)
[&lt;c0214dc0&gt;] (handle_IPI) from [&lt;c0208930&gt;] (gic_handle_irq+0x64/0x68)
[&lt;c0208930&gt;] (gic_handle_irq) from [&lt;c0212d04&gt;] (__irq_svc+0x44/0x5c)
Exception stack(0xe63ddea0 to 0xe63ddee8)
dea0: 00000001 00000001 00000000 c2f3b200 c16db380 c032d4a0 e63ddf40 60010013
dec0: 00000000 001fbfd4 00000100 00000000 00000001 e63ddee8 c0284770 c02a2e30
dee0: 20010013 ffffffff
[&lt;c0212d04&gt;] (__irq_svc) from [&lt;c02a2e30&gt;] (ktime_get_ts64+0x1c8/0x200)
[&lt;c02a2e30&gt;] (ktime_get_ts64) from [&lt;c032d4a0&gt;] (poll_select_set_timeout+0x60/0xa8)
[&lt;c032d4a0&gt;] (poll_select_set_timeout) from [&lt;c032df64&gt;] (SyS_select+0xa8/0x118)
[&lt;c032df64&gt;] (SyS_select) from [&lt;c020e8e0&gt;] (ret_fast_syscall+0x0/0x48)
---[ end trace 0bb583b46342da6f ]---
INFO: lockdep is turned off.

We don't really need to get the platform irq again when we're
enabling or disabling the per-cpu irq. Furthermore, we don't
really need to set and clear bits in the active_irqs bitmask
because that's only used in the non-percpu irq case to figure out
when the last CPU PMU has been disabled. Just pass the irq
directly to the enable/disable functions to clean all this up.
This should be slightly more efficient and also fix the
scheduling while atomic bug.

Fixes: bbd64559376f "ARM: perf: support percpu irqs for the CPU PMU"

Reported-by: Rob Clark &lt;robdclark@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2014-06-13T02:18:49+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-06-13T02:18:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3737a12761636ebde0f09ef49daebb8eed18cc8a'/>
<id>3737a12761636ebde0f09ef49daebb8eed18cc8a</id>
<content type='text'>
Pull more perf updates from Ingo Molnar:
 "A second round of perf updates:

   - wide reaching kprobes sanitization and robustization, with the hope
     of fixing all 'probe this function crashes the kernel' bugs, by
     Masami Hiramatsu.

   - uprobes updates from Oleg Nesterov: tmpfs support, corner case
     fixes and robustization work.

   - perf tooling updates and fixes from Jiri Olsa, Namhyung Ki, Arnaldo
     et al:
        * Add support to accumulate hist periods (Namhyung Kim)
        * various fixes, refactorings and enhancements"

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (101 commits)
  perf: Differentiate exec() and non-exec() comm events
  perf: Fix perf_event_comm() vs. exec() assumption
  uprobes/x86: Rename arch_uprobe-&gt;def to -&gt;defparam, minor comment updates
  perf/documentation: Add description for conditional branch filter
  perf/x86: Add conditional branch filtering support
  perf/tool: Add conditional branch filter 'cond' to perf record
  perf: Add new conditional branch filter 'PERF_SAMPLE_BRANCH_COND'
  uprobes: Teach copy_insn() to support tmpfs
  uprobes: Shift -&gt;readpage check from __copy_insn() to uprobe_register()
  perf/x86: Use common PMU interrupt disabled code
  perf/ARM: Use common PMU interrupt disabled code
  perf: Disable sampled events if no PMU interrupt
  perf: Fix use after free in perf_remove_from_context()
  perf tools: Fix 'make help' message error
  perf record: Fix poll return value propagation
  perf tools: Move elide bool into perf_hpp_fmt struct
  perf tools: Remove elide setup for SORT_MODE__MEMORY mode
  perf tools: Fix "==" into "=" in ui_browser__warning assignment
  perf tools: Allow overriding sysfs and proc finding with env var
  perf tools: Consider header files outside perf directory in tags target
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull more perf updates from Ingo Molnar:
 "A second round of perf updates:

   - wide reaching kprobes sanitization and robustization, with the hope
     of fixing all 'probe this function crashes the kernel' bugs, by
     Masami Hiramatsu.

   - uprobes updates from Oleg Nesterov: tmpfs support, corner case
     fixes and robustization work.

   - perf tooling updates and fixes from Jiri Olsa, Namhyung Ki, Arnaldo
     et al:
        * Add support to accumulate hist periods (Namhyung Kim)
        * various fixes, refactorings and enhancements"

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (101 commits)
  perf: Differentiate exec() and non-exec() comm events
  perf: Fix perf_event_comm() vs. exec() assumption
  uprobes/x86: Rename arch_uprobe-&gt;def to -&gt;defparam, minor comment updates
  perf/documentation: Add description for conditional branch filter
  perf/x86: Add conditional branch filtering support
  perf/tool: Add conditional branch filter 'cond' to perf record
  perf: Add new conditional branch filter 'PERF_SAMPLE_BRANCH_COND'
  uprobes: Teach copy_insn() to support tmpfs
  uprobes: Shift -&gt;readpage check from __copy_insn() to uprobe_register()
  perf/x86: Use common PMU interrupt disabled code
  perf/ARM: Use common PMU interrupt disabled code
  perf: Disable sampled events if no PMU interrupt
  perf: Fix use after free in perf_remove_from_context()
  perf tools: Fix 'make help' message error
  perf record: Fix poll return value propagation
  perf tools: Move elide bool into perf_hpp_fmt struct
  perf tools: Remove elide setup for SORT_MODE__MEMORY mode
  perf tools: Fix "==" into "=" in ui_browser__warning assignment
  perf tools: Allow overriding sysfs and proc finding with env var
  perf tools: Consider header files outside perf directory in tags target
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>perf/ARM: Use common PMU interrupt disabled code</title>
<updated>2014-06-05T10:30:00+00:00</updated>
<author>
<name>Vince Weaver</name>
<email>vincent.weaver@maine.edu</email>
</author>
<published>2014-05-16T21:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=edcb4d3c36a6429caa03ddfeab4cbb153c7002b2'/>
<id>edcb4d3c36a6429caa03ddfeab4cbb153c7002b2</id>
<content type='text'>
Make the ARM perf code use the new common PMU interrupt disabled code.

This allows perf to work on ARM machines without a working PMU
interrupt (for example, raspberry pi).

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
[peterz: applied changes suggested by Will]
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu
[ Small readability tweaks to the code. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make the ARM perf code use the new common PMU interrupt disabled code.

This allows perf to work on ARM machines without a working PMU
interrupt (for example, raspberry pi).

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Vince Weaver &lt;vincent.weaver@maine.edu&gt;
[peterz: applied changes suggested by Will]
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu
[ Small readability tweaks to the code. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 8054/1: perf: add support for the Cortex-A17 PMU</title>
<updated>2014-05-25T22:49:43+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2014-05-09T17:34:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=03eff46ce31dbb186fea3eb2016e1c41f000db7e'/>
<id>03eff46ce31dbb186fea3eb2016e1c41f000db7e</id>
<content type='text'>
The Cortex-A17 PMU is identical to that of the A12, so wire up a new
compatible string to the existing event structures.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Cortex-A17 PMU is identical to that of the A12, so wire up a new
compatible string to the existing event structures.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: perf: add support for the Cortex-A12 PMU</title>
<updated>2014-02-21T11:11:23+00:00</updated>
<author>
<name>Albin Tonnerre</name>
<email>albin.tonnerre@arm.com</email>
</author>
<published>2014-01-29T14:28:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8e781f65423c2e8e65a56972ba996b6c01a5ef3e'/>
<id>8e781f65423c2e8e65a56972ba996b6c01a5ef3e</id>
<content type='text'>
Cortex-A12 implements Performance Monitors compliant with the PMUv2
architecture.

This patch adds support for the Cortex-A12 PMU to the ARM perf backend.

Signed-off-by: Albin Tonnerre &lt;albin.tonnerre@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Cortex-A12 implements Performance Monitors compliant with the PMUv2
architecture.

This patch adds support for the Cortex-A12 PMU to the ARM perf backend.

Signed-off-by: Albin Tonnerre &lt;albin.tonnerre@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: perf: remove unused PMU probing code</title>
<updated>2014-02-21T11:11:22+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2014-02-18T10:31:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=51e5fef62059e4074054ee731385e0dc7ca561ff'/>
<id>51e5fef62059e4074054ee731385e0dc7ca561ff</id>
<content type='text'>
The ARM perf backend can discover the type of PMU it needs to drive
either from DT or by probing a CPU it is running on. For
Cortex-A{5,7,15} there are no platforms in mainline not using dt, and
this probing won't work well for big.LITTLE systems with heterogeneous
PMUs.

This patch drops the probing for those CPUs, relying on information from
dt instead. Future platforms should describe their PMU(s) with dt.

Suggested-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ARM perf backend can discover the type of PMU it needs to drive
either from DT or by probing a CPU it is running on. For
Cortex-A{5,7,15} there are no platforms in mainline not using dt, and
this probing won't work well for big.LITTLE systems with heterogeneous
PMUs.

This patch drops the probing for those CPUs, relying on information from
dt instead. Future platforms should describe their PMU(s) with dt.

Suggested-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: perf: add basic support for Krait CPU PMUs</title>
<updated>2014-02-21T11:11:02+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-02-07T21:01:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2a3391cdb3c7bbea3be5cb39279764843a15ef25'/>
<id>2a3391cdb3c7bbea3be5cb39279764843a15ef25</id>
<content type='text'>
Add basic support for the Krait CPU PMU. This allows us to use
the architected functionality of the PMU.

This is based on code originally written by Ashwin Chaugule and
Neil Leeder [1].

[1] https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/kernel/perf_event_msm_krait.c?h=msm-3.4

Cc: Neil Leeder &lt;nleeder@codeaurora.org&gt;
Cc: Ashwin Chaugule &lt;ashwinc@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add basic support for the Krait CPU PMU. This allows us to use
the architected functionality of the PMU.

This is based on code originally written by Ashwin Chaugule and
Neil Leeder [1].

[1] https://www.codeaurora.org/cgit/quic/la/kernel/msm/tree/arch/arm/kernel/perf_event_msm_krait.c?h=msm-3.4

Cc: Neil Leeder &lt;nleeder@codeaurora.org&gt;
Cc: Ashwin Chaugule &lt;ashwinc@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: perf: assign pdev pointer earlier for CPU PMUs</title>
<updated>2014-02-21T11:10:52+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-02-07T21:01:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3a3967ed9135f931f3848b0c946dcf3c10ca9f9a'/>
<id>3a3967ed9135f931f3848b0c946dcf3c10ca9f9a</id>
<content type='text'>
We want to inspect the of_node that the pdev is pointing to in
the Krait CPU specific PMU initialization function. Assign it
earlier so that we don't crash with a NULL pointer dereference.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We want to inspect the of_node that the pdev is pointing to in
the Krait CPU specific PMU initialization function. Assign it
earlier so that we don't crash with a NULL pointer dereference.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: perf: support percpu irqs for the CPU PMU</title>
<updated>2014-02-21T11:10:44+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-02-07T21:01:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=bbd64559376fa25732994c4181c8ec493fa57871'/>
<id>bbd64559376fa25732994c4181c8ec493fa57871</id>
<content type='text'>
Some CPU PMUs are wired up with one PPI for all the CPUs instead
of with a different SPI for each CPU. Add support for these
devices.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some CPU PMUs are wired up with one PPI for all the CPUs instead
of with a different SPI for each CPU. Add support for these
devices.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 7937/1: perf_event: Silence sparse warning</title>
<updated>2014-01-11T12:06:58+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2014-01-09T23:57:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=261521f142fb426b58ed460d2476049dc8fa4fb9'/>
<id>261521f142fb426b58ed460d2476049dc8fa4fb9</id>
<content type='text'>
arch/arm/kernel/perf_event_cpu.c:274:25: warning: incorrect type in assignment (different modifiers)
arch/arm/kernel/perf_event_cpu.c:274:25: expected int ( *init_fn )( ... )
arch/arm/kernel/perf_event_cpu.c:274:25: got void const *const data

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
arch/arm/kernel/perf_event_cpu.c:274:25: warning: incorrect type in assignment (different modifiers)
arch/arm/kernel/perf_event_cpu.c:274:25: expected int ( *init_fn )( ... )
arch/arm/kernel/perf_event_cpu.c:274:25: got void const *const data

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
</feed>
