linux.git/arch/arm/mm, branch v4.4.215

ARM: fix the cockup in the previous patch

2019-11-10T10:21:38+00:00

Commit d6951f582cc50ba0ad22ef46b599740966599b14 upstream.

The intention in the previous patch was to only place the processor
tables in the .rodata section if big.Little was being built and we
wanted the branch target hardening, but instead (due to the way it
was tested) it ended up always placing the tables into the .rodata
section.

Although harmless, let's correct this anyway.

Fixes: 3a4d0c2172bc ("ARM: ensure that processor vtables is not lost after boot")
Signed-off-by: Russell King 
Signed-off-by: David A. Long 
Reviewed-by: Julien Thierry 
Signed-off-by: Sasha Levin 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: ensure that processor vtables is not lost after boot

2019-11-10T10:21:38+00:00

Commit 3a4d0c2172bcf15b7a3d9d498b2b355f9864286b upstream.

Marek Szyprowski reported problems with CPU hotplug in current kernels.
This was tracked down to the processor vtables being located in an
init section, and therefore discarded after kernel boot, despite being
required after boot to properly initialise the non-boot CPUs.

Arrange for these tables to end up in .rodata when required.

Reported-by: Marek Szyprowski 
Tested-by: Krzysztof Kozlowski 
Fixes: 383fb3ee8024 ("ARM: spectre-v2: per-CPU vtables to work around big.Little systems")
Signed-off-by: Russell King 
Signed-off-by: David A. Long 
Reviewed-by: Julien Thierry 
Signed-off-by: Sasha Levin 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: per-CPU vtables to work around big.Little systems

2019-11-10T10:21:37+00:00

Commit 383fb3ee8024d596f488d2dbaf45e572897acbdb upstream.

In big.Little systems, some CPUs require the Spectre workarounds in
paths such as the context switch, but other CPUs do not.  In order
to handle these differences, we need per-CPU vtables.

We are unable to use the kernel's per-CPU variables to support this
as per-CPU is not initialised at times when we need access to the
vtables, so we have to use an array indexed by logical CPU number.

We use an array-of-pointers to avoid having function pointers in
the kernel's read/write .data section.

Note: Added include of linux/slab.h in arch/arm/smp.c.

Reviewed-by: Julien Thierry 
Signed-off-by: Russell King 
Signed-off-by: David A. Long 
Reviewed-by: Julien Thierry 
Signed-off-by: Sasha Levin 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: warn about incorrect context switching functions

2019-11-10T10:21:27+00:00

Commit c44f366ea7c85e1be27d08f2f0880f4120698125 upstream.

Warn at error level if the context switching function is not what we
are expecting.  This can happen with big.Little systems, which we
currently do not support.

Signed-off-by: Russell King 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Acked-by: Marc Zyngier 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: add firmware based hardening

2019-11-10T10:21:26+00:00

Commit 10115105cb3aa17b5da1cb726ae8dd5f6854bd93 upstream.

Add firmware based hardening for cores that require more complex
handling in firmware.

Signed-off-by: Russell King 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Reviewed-by: Marc Zyngier 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: harden user aborts in kernel space

2019-11-10T10:21:26+00:00

Commit f5fe12b1eaee220ce62ff9afb8b90929c396595f upstream.

In order to prevent aliasing attacks on the branch predictor,
invalidate the BTB or instruction cache on CPUs that are known to be
affected when taking an abort on a address that is outside of a user
task limit:

Cortex A8, A9, A12, A17, A73, A75: flush BTB.
Cortex A15, Brahma B15: invalidate icache.

If the IBE bit is not set, then there is little point to enabling the
workaround.

Signed-off-by: Russell King 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: add Cortex A8 and A15 validation of the IBE bit

2019-11-10T10:21:25+00:00

Commit e388b80288aade31135aca23d32eee93dd106795 upstream.

When the branch predictor hardening is enabled, firmware must have set
the IBE bit in the auxiliary control register.  If this bit has not
been set, the Spectre workarounds will not be functional.

Add validation that this bit is set, and print a warning at alert level
if this is not the case.

Signed-off-by: Russell King 
Reviewed-by: Florian Fainelli 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre-v2: harden branch predictor on context switches

2019-11-10T10:21:25+00:00

Commit 06c23f5ffe7ad45b908d0fff604dae08a7e334b9 upstream.

Required manual merge of arch/arm/mm/proc-v7.S.

Harden the branch predictor against Spectre v2 attacks on context
switches for ARMv7 and later CPUs.  We do this by:

Cortex A9, A12, A17, A73, A75: invalidating the BTB.
Cortex A15, Brahma B15: invalidating the instruction cache.

Cortex A57 and Cortex A72 are not addressed in this patch.

Cortex R7 and Cortex R8 are also not addressed as we do not enforce
memory protection on these cores.

Signed-off-by: Russell King 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Acked-by: Marc Zyngier 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: spectre: add Kconfig symbol for CPUs vulnerable to Spectre

2019-11-10T10:21:24+00:00

Commit c58d237d0852a57fde9bc2c310972e8f4e3d155d upstream.

Add a Kconfig symbol for CPUs which are vulnerable to the Spectre
attacks.

Signed-off-by: Russell King 
Reviewed-by: Florian Fainelli 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Acked-by: Marc Zyngier 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman

ARM: bugs: add support for per-processor bug checking

2019-11-10T10:21:24+00:00

Commit 9d3a04925deeabb97c8e26d940b501a2873e8af3 upstream.

Add support for per-processor bug checking - each processor function
descriptor gains a function pointer for this check, which must not be
an __init function.  If non-NULL, this will be called whenever a CPU
enters the kernel via which ever path (boot CPU, secondary CPU startup,
CPU resuming, etc.)

This allows processor specific bug checks to validate that workaround
bits are properly enabled by firmware via all entry paths to the kernel.

Signed-off-by: Russell King 
Reviewed-by: Florian Fainelli 
Boot-tested-by: Tony Lindgren 
Reviewed-by: Tony Lindgren 
Acked-by: Marc Zyngier 
Signed-off-by: David A. Long 
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Greg Kroah-Hartman