<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/i386/kernel/cpu, branch master</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>i386: move kernel/cpu</title>
<updated>2007-10-11T09:16:58+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-10-11T09:16:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=f7627e2513987bb5d4e8cb13c4e0a478352141ac'/>
<id>f7627e2513987bb5d4e8cb13c4e0a478352141ac</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i386: move kernel/cpu/mtrr</title>
<updated>2007-10-11T09:16:28+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-10-11T09:16:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2ec1df4130c60d1eb49dc0fa0ed15858fede6b05'/>
<id>2ec1df4130c60d1eb49dc0fa0ed15858fede6b05</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i386: move kernel/cpu/cpufreq</title>
<updated>2007-10-11T09:16:27+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-10-11T09:16:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=ee580dc91efd83e6b55955e7261e8ad2a0e08d1a'/>
<id>ee580dc91efd83e6b55955e7261e8ad2a0e08d1a</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i386: move kernel/cpu/mcheck</title>
<updated>2007-10-11T09:16:25+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-10-11T09:16:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=c18db0d7e299791c73d4dbe5ae7905b2ab8ba332'/>
<id>c18db0d7e299791c73d4dbe5ae7905b2ab8ba332</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Longhaul: add auto enabled "revid_errata" option</title>
<updated>2007-10-07T23:28:43+00:00</updated>
<author>
<name>Rafal Bilski</name>
<email>rafalbilski@interia.pl</email>
</author>
<published>2007-10-07T07:24:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=52a2638bff063acb28ba3355891c49cc240cc98b'/>
<id>52a2638bff063acb28ba3355891c49cc240cc98b</id>
<content type='text'>
VIA C3 Ezra-T has RevisionID equal to 1, but it needs RevisionKey to be 0
or CPU will ignore new frequency and will continue to work at old
frequency.  New "revid_errata" option will force RevisionKey to be set to
0, whatever RevisionID is.

Additionaly "Longhaul" will not silently ignore unsuccessful transition.
It will try to check if "revid_errata" or "disable_acpi_c3" options need to
be enabled for this processor/system.

Same for Longhaul ver.  2 support.  It will be disabled if none of above
options will work.

 Best case scenario (with patch apllied and v2 enabled):
 longhaul: VIA C3 'Ezra' [C5C] CPU detected.  Longhaul v2 supported.
 longhaul: Using northbridge support.
 longhaul: VRM 8.5
 longhaul: Max VID=1.350  Min VID=1.050, 13 possible voltage scales
 longhaul: f: 300000 kHz, index: 0, vid: 1050 mV
 [...]
 longhaul: Voltage scaling enabled.
 Worst case scenario:
 longhaul: VIA C3 'Ezra-T' [C5M] CPU detected.  Powersaver supported.
 longhaul: Using northbridge support.
 longhaul: Using ACPI support.
 longhaul: VRM 8.5
 longhaul: Claims to support voltage scaling but min &amp; max are both 1.250. Voltage scaling disabled
 longhaul: Failed to set requested frequency!
 longhaul: Enabling "Ignore Revision ID" option.
 longhaul: Failed to set requested frequency!
 longhaul: Disabling ACPI C3 support.
 longhaul: Disabling "Ignore Revision ID" option.
 longhaul: Failed to set requested frequency!
 longhaul: Enabling "Ignore Revision ID" option.

[akpm@linux-foundation.org: coding-style cleanups]
Signed-off-by: Rafal Bilski &lt;rafalbilski@interia.pl&gt;
Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
VIA C3 Ezra-T has RevisionID equal to 1, but it needs RevisionKey to be 0
or CPU will ignore new frequency and will continue to work at old
frequency.  New "revid_errata" option will force RevisionKey to be set to
0, whatever RevisionID is.

Additionaly "Longhaul" will not silently ignore unsuccessful transition.
It will try to check if "revid_errata" or "disable_acpi_c3" options need to
be enabled for this processor/system.

Same for Longhaul ver.  2 support.  It will be disabled if none of above
options will work.

 Best case scenario (with patch apllied and v2 enabled):
 longhaul: VIA C3 'Ezra' [C5C] CPU detected.  Longhaul v2 supported.
 longhaul: Using northbridge support.
 longhaul: VRM 8.5
 longhaul: Max VID=1.350  Min VID=1.050, 13 possible voltage scales
 longhaul: f: 300000 kHz, index: 0, vid: 1050 mV
 [...]
 longhaul: Voltage scaling enabled.
 Worst case scenario:
 longhaul: VIA C3 'Ezra-T' [C5M] CPU detected.  Powersaver supported.
 longhaul: Using northbridge support.
 longhaul: Using ACPI support.
 longhaul: VRM 8.5
 longhaul: Claims to support voltage scaling but min &amp; max are both 1.250. Voltage scaling disabled
 longhaul: Failed to set requested frequency!
 longhaul: Enabling "Ignore Revision ID" option.
 longhaul: Failed to set requested frequency!
 longhaul: Disabling ACPI C3 support.
 longhaul: Disabling "Ignore Revision ID" option.
 longhaul: Failed to set requested frequency!
 longhaul: Enabling "Ignore Revision ID" option.

[akpm@linux-foundation.org: coding-style cleanups]
Signed-off-by: Rafal Bilski &lt;rafalbilski@interia.pl&gt;
Signed-off-by: Dave Jones &lt;davej@redhat.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86_64: Prevent doing anything from cache_remove_dev() when info setup failed.</title>
<updated>2007-09-12T16:28:06+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2007-09-11T12:02:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2966c6a03efd90197582eae8590d82c789475680'/>
<id>2966c6a03efd90197582eae8590d82c789475680</id>
<content type='text'>
AK: Removed the unlikelies because gcc heuristics default to unlikely
AK: for test == NULL and for negative returns.

Cc: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AK: Removed the unlikelies because gcc heuristics default to unlikely
AK: for test == NULL and for negative returns.

Cc: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Cc: Ashok Raj &lt;ashok.raj@intel.com&gt;
Cc: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Signed-off-by: Jan Beulich &lt;jbeulich@novell.com&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i386: Fix perfctr watchdog on core duo</title>
<updated>2007-09-11T01:57:47+00:00</updated>
<author>
<name>Stephane Eranian</name>
<email>eranian@hpl.hp.com</email>
</author>
<published>2007-09-06T14:59:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=23d5ea5d3edcfe899cd91fca87a4af799bcc5794'/>
<id>23d5ea5d3edcfe899cd91fca87a4af799bcc5794</id>
<content type='text'>
Fix the NMI watchdog on Intel CoreDuo processor where the kernel would
get stuck during boot.  The issue is related to errata AE49, where the
PERFEVTSEL1 counter does not have a working enable bit.  Thus it is not
possible to use it for NMI.

The patch creates a dedicated wd_ops for CoreDuo which falls back to
using PERFEVTSEL0.  The other Intel processors supporting the
architectural PMU will keep on using PERFEVTSEL1 as this allows other
subsystems, such as perfmon, to use PERFEVTSEL0 for PEBS monitoring in
particular.  Bug initially reported by Daniel Walker.

AK: Added comments

Signed-off-by: Stephane Eranian &lt;eranian@hpl.hp.com&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the NMI watchdog on Intel CoreDuo processor where the kernel would
get stuck during boot.  The issue is related to errata AE49, where the
PERFEVTSEL1 counter does not have a working enable bit.  Thus it is not
possible to use it for NMI.

The patch creates a dedicated wd_ops for CoreDuo which falls back to
using PERFEVTSEL0.  The other Intel processors supporting the
architectural PMU will keep on using PERFEVTSEL1 as this allows other
subsystems, such as perfmon, to use PERFEVTSEL0 for PEBS monitoring in
particular.  Bug initially reported by Daniel Walker.

AK: Added comments

Signed-off-by: Stephane Eranian &lt;eranian@hpl.hp.com&gt;
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Pull processor into release branch</title>
<updated>2007-08-12T04:21:08+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2007-08-12T04:21:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=27196c30db1ed4ab09c2071149b3324a1a53cfb9'/>
<id>27196c30db1ed4ab09c2071149b3324a1a53cfb9</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>i386: Use global flag to disable broken local apic timer on AMD CPUs.</title>
<updated>2007-08-11T22:58:13+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2007-08-10T20:31:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=d3f7eae182b04997be19343a23f7009170f4f7a5'/>
<id>d3f7eae182b04997be19343a23f7009170f4f7a5</id>
<content type='text'>
The Averatec 2370 and some other Turion laptop BIOS seems to program the
ENABLE_C1E MSR inconsistently between cores. This confuses the lapic
use heuristics because when C1E is enabled anywhere it seems to affect
the complete chip.

Use a global flag instead of a per cpu flag to handle this.
If any CPU has C1E enabled disabled lapic use.

Thanks to Cal Peake for debugging.

Cc: tglx@linutronix.de
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Averatec 2370 and some other Turion laptop BIOS seems to program the
ENABLE_C1E MSR inconsistently between cores. This confuses the lapic
use heuristics because when C1E is enabled anywhere it seems to affect
the complete chip.

Use a global flag instead of a per cpu flag to handle this.
If any CPU has C1E enabled disabled lapic use.

Thanks to Cal Peake for debugging.

Cc: tglx@linutronix.de
Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>acpi-cpufreq: Fix some x86/x86-64 acpi-cpufreq driver issues</title>
<updated>2007-08-07T22:40:30+00:00</updated>
<author>
<name>Fenghua Yu</name>
<email>fenghua.yu@intel.com</email>
</author>
<published>2007-08-07T22:40:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=501092929ccb8a1d2eb0ed700e38df4ae0de7108'/>
<id>501092929ccb8a1d2eb0ed700e38df4ae0de7108</id>
<content type='text'>
This patch addresses some issues in x86/x86-64 acpi-cpufreq driver:

1.  Current memory allocation for acpi_perf_data is actually open-coded
   alloc_percpu().  The patch defines and handles acpi_perf_data as percpu
   data.  The code will be cleaner and easier to be maintained with this
   change.

2. Won't load driver in acpi_cpufreq_early_init() failure case.

3. Add __init for acpi_cpufreq_early_init().

Signed-off-by: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Acked-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Cc: Dave Jones &lt;davej@codemonkey.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch addresses some issues in x86/x86-64 acpi-cpufreq driver:

1.  Current memory allocation for acpi_perf_data is actually open-coded
   alloc_percpu().  The patch defines and handles acpi_perf_data as percpu
   data.  The code will be cleaner and easier to be maintained with this
   change.

2. Won't load driver in acpi_cpufreq_early_init() failure case.

3. Add __init for acpi_cpufreq_early_init().

Signed-off-by: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
Acked-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Cc: Dave Jones &lt;davej@codemonkey.org.uk&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
