<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/pci, branch v4.1.29</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2015-04-17T19:50:54+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-04-17T19:50:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=bfaf245022b4b8661af2e35f467cf0e91943c24c'/>
<id>bfaf245022b4b8661af2e35f467cf0e91943c24c</id>
<content type='text'>
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for Linux 4.1.  Most
  noteworthy:

   - Add more Octeon-optimized crypto functions
   - Octeon crypto preemption and locking fixes
   - Little endian support for Octeon
   - Use correct CSR to soft reset Octeons
   - Support LEDs on the Octeon-based DSR-1000N
   - Fix PCI interrupt mapping for the Octeon-based DSR-1000N
   - Mark prom_free_prom_memory() as __init for a number of systems
   - Support for Imagination's Pistachio SOC.  This includes arch and
     CLK bits.  I'd like to merge pinctrl bits later
   - Improve parallelism of csum_partial for certain pipelines
   - Organize DTB files in subdirs like other architectures
   - Implement read_sched_clock for all MIPS platforms other than
     Octeon
   - Massive series of 38 fixes and cleanups for the FPU emulator /
     kernel
   - Further FPU remulator work to support new features.  This sits on a
     separate branch which also has been pulled into the 4.1 KVM branch
   - Clean up and fixes for the SEAD3 eval board; remove unused file
   - Various updates for Netlogic platforms
   - A number of small updates for Loongson 3 platforms
   - Increase the memory limit for ATH79 platforms to 256MB
   - A fair number of fixes and updates for BCM47xx platforms
   - Finish the implementation of XPA support
   - MIPS FDC support.  No, not floppy controller but Fast Debug Channel :)
   - Detect the R16000 used in SGI legacy platforms
   - Fix Kconfig dependencies for the SSB bus support"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
  MIPS: Makefile: Fix MIPS ASE detection code
  MIPS: asm: elf: Set O32 default FPU flags
  MIPS: BCM47XX: Fix detecting Microsoft MN-700 &amp; Asus WL500G
  MIPS: Kconfig: Disable SMP/CPS for 64-bit
  MIPS: Hibernate: flush TLB entries earlier
  MIPS: smp-cps: cpu_set FPU mask if FPU present
  MIPS: lose_fpu(): Disable FPU when MSA enabled
  MIPS: ralink: add missing symbol for RALINK_ILL_ACC
  MIPS: ralink: Fix bad config symbol in PCI makefile.
  SSB: fix Kconfig dependencies
  MIPS: Malta: Detect and fix bad memsize values
  Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
  MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
  MIPS: Fix cpu_has_mips_r2_exec_hazard.
  MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
  MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
  MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
  MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
  MIPS: unaligned: Fix regular load/store instruction emulation for EVA
  MIPS: unaligned: Surround load/store macros in do {} while statements
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for MIPS for Linux 4.1.  Most
  noteworthy:

   - Add more Octeon-optimized crypto functions
   - Octeon crypto preemption and locking fixes
   - Little endian support for Octeon
   - Use correct CSR to soft reset Octeons
   - Support LEDs on the Octeon-based DSR-1000N
   - Fix PCI interrupt mapping for the Octeon-based DSR-1000N
   - Mark prom_free_prom_memory() as __init for a number of systems
   - Support for Imagination's Pistachio SOC.  This includes arch and
     CLK bits.  I'd like to merge pinctrl bits later
   - Improve parallelism of csum_partial for certain pipelines
   - Organize DTB files in subdirs like other architectures
   - Implement read_sched_clock for all MIPS platforms other than
     Octeon
   - Massive series of 38 fixes and cleanups for the FPU emulator /
     kernel
   - Further FPU remulator work to support new features.  This sits on a
     separate branch which also has been pulled into the 4.1 KVM branch
   - Clean up and fixes for the SEAD3 eval board; remove unused file
   - Various updates for Netlogic platforms
   - A number of small updates for Loongson 3 platforms
   - Increase the memory limit for ATH79 platforms to 256MB
   - A fair number of fixes and updates for BCM47xx platforms
   - Finish the implementation of XPA support
   - MIPS FDC support.  No, not floppy controller but Fast Debug Channel :)
   - Detect the R16000 used in SGI legacy platforms
   - Fix Kconfig dependencies for the SSB bus support"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
  MIPS: Makefile: Fix MIPS ASE detection code
  MIPS: asm: elf: Set O32 default FPU flags
  MIPS: BCM47XX: Fix detecting Microsoft MN-700 &amp; Asus WL500G
  MIPS: Kconfig: Disable SMP/CPS for 64-bit
  MIPS: Hibernate: flush TLB entries earlier
  MIPS: smp-cps: cpu_set FPU mask if FPU present
  MIPS: lose_fpu(): Disable FPU when MSA enabled
  MIPS: ralink: add missing symbol for RALINK_ILL_ACC
  MIPS: ralink: Fix bad config symbol in PCI makefile.
  SSB: fix Kconfig dependencies
  MIPS: Malta: Detect and fix bad memsize values
  Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
  MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
  MIPS: Fix cpu_has_mips_r2_exec_hazard.
  MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
  MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
  MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
  MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
  MIPS: unaligned: Fix regular load/store instruction emulation for EVA
  MIPS: unaligned: Surround load/store macros in do {} while statements
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch '4.0-fixes' into mips-for-linux-next</title>
<updated>2015-04-13T14:03:32+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2015-04-13T14:03:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3e20a26b02bd4f24945c87407df51948dd488620'/>
<id>3e20a26b02bd4f24945c87407df51948dd488620</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: ralink: Fix bad config symbol in PCI makefile.</title>
<updated>2015-04-10T13:41:50+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2015-02-23T05:17:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=93a7de8819a661d06eb11f4de3d6888b9a842b30'/>
<id>93a7de8819a661d06eb11f4de3d6888b9a842b30</id>
<content type='text'>
A wrong symbol is referenced by commit 187c26ddf0b2 ("MIPS: ralink: add rt2880
pci driver"). Fix this by changing it to the correct symbol.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Reported-by: Paul Bolle &lt;pebolle@tiscali.nl&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9298/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A wrong symbol is referenced by commit 187c26ddf0b2 ("MIPS: ralink: add rt2880
pci driver"). Fix this by changing it to the correct symbol.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Reported-by: Paul Bolle &lt;pebolle@tiscali.nl&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9298/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: OCTEON: fix PCI interrupt mapping for D-Link DSR-1000N</title>
<updated>2015-04-10T13:41:42+00:00</updated>
<author>
<name>Aaro Koskinen</name>
<email>aaro.koskinen@iki.fi</email>
</author>
<published>2015-03-22T15:55:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=b083518c52ab75a345d668ca7fa41e530df08d51'/>
<id>b083518c52ab75a345d668ca7fa41e530df08d51</id>
<content type='text'>
Fix PCI interrupt mapping for DSR1000N. This will get the PCI slot
interrupts working. The mapping is based on D-Link GPL tarball.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9593/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix PCI interrupt mapping for DSR1000N. This will get the PCI slot
interrupts working. The mapping is based on D-Link GPL tarball.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9593/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Octeon: Remove udelay() causing huge IRQ latency</title>
<updated>2015-04-10T13:41:42+00:00</updated>
<author>
<name>Alexander Sverdlin</name>
<email>alexander.sverdlin@nokia.com</email>
</author>
<published>2015-03-18T13:05:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=73bf3c2a500b2db8ac966469591196bf55afb409'/>
<id>73bf3c2a500b2db8ac966469591196bf55afb409</id>
<content type='text'>
udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
platforms because these operations are called from PCI_OP_READ() and
PCI_OP_WRITE() under raw_spin_lock_irqsave().

Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@nokia.com&gt;
Cc: linux-mips@linux-mips.org
Cc: David Daney &lt;ddaney@cavium.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: Jiri Kosina &lt;jkosina@suse.cz&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Masanari Iida &lt;standby24x7@gmail.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Mathias &lt;mathias.rulf@nokia.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9576/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
udelay() in PCI/PCIe read/write callbacks cause 30ms IRQ latency on Octeon
platforms because these operations are called from PCI_OP_READ() and
PCI_OP_WRITE() under raw_spin_lock_irqsave().

Signed-off-by: Alexander Sverdlin &lt;alexander.sverdlin@nokia.com&gt;
Cc: linux-mips@linux-mips.org
Cc: David Daney &lt;ddaney@cavium.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: Jiri Kosina &lt;jkosina@suse.cz&gt;
Cc: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: Masanari Iida &lt;standby24x7@gmail.com&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Mathias &lt;mathias.rulf@nokia.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9576/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller</title>
<updated>2015-04-01T15:22:16+00:00</updated>
<author>
<name>Joshua Kinard</name>
<email>kumba@gentoo.org</email>
</author>
<published>2015-01-19T09:19:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=a2e50f53d535fa885a432fb9fc3e3ca5ed97364c'/>
<id>a2e50f53d535fa885a432fb9fc3e3ca5ed97364c</id>
<content type='text'>
On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI
buses attached to the Xtalk bus.  The current code will stop counting PCI buses
after it finds the first one.  If one installs the optional PCI cardcage
("shoebox") into these systems, because of the order of the Xtalk widgets, the
current PCI code will find the cardcage first, and fail to detect the BaseIO
PCI devices, which are on a higher Xtalk widget ID.

This patch adds the hooks needed for resolving this issue in the IP27 PCI code
(in a later patch).

Verified on both an SGI Onyx2 and an SGI Octane.

Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Cc: Linux MIPS List &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9074/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI
buses attached to the Xtalk bus.  The current code will stop counting PCI buses
after it finds the first one.  If one installs the optional PCI cardcage
("shoebox") into these systems, because of the order of the Xtalk widgets, the
current PCI code will find the cardcage first, and fail to detect the BaseIO
PCI devices, which are on a higher Xtalk widget ID.

This patch adds the hooks needed for resolving this issue in the IP27 PCI code
(in a later patch).

Verified on both an SGI Onyx2 and an SGI Octane.

Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Cc: Linux MIPS List &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9074/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: pci: Drop owner assignment from platform_drivers</title>
<updated>2015-04-01T15:21:55+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa@the-dreams.de</email>
</author>
<published>2014-12-21T21:14:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=02e47ca9bceb4f20c7e321590e17f1fb1e0cdf9b'/>
<id>02e47ca9bceb4f20c7e321590e17f1fb1e0cdf9b</id>
<content type='text'>
This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8824/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: Wolfram Sang &lt;wsa@the-dreams.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8824/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: MSI: Update MSI handling for XLP</title>
<updated>2015-04-01T15:21:49+00:00</updated>
<author>
<name>Jayachandran C</name>
<email>jchandra@broadcom.com</email>
</author>
<published>2015-01-07T11:28:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=53f676977dddaa6784dab7b058cfe8895e3c8772'/>
<id>53f676977dddaa6784dab7b058cfe8895e3c8772</id>
<content type='text'>
The per-cpu interrupt ACK using EIRR has to be done just once after
all the bits in the status register are processed.

PIC ack has to be done once in case of MSI, and for every interrupt
in case of MSI-X

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8887/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The per-cpu interrupt ACK using EIRR has to be done just once after
all the bits in the status register are processed.

PIC ack has to be done once in case of MSI, and for every interrupt
in case of MSI-X

Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8887/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Cleanup control flow</title>
<updated>2015-03-19T15:17:22+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2015-03-12T20:07:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9e808eb6a7689b61399f772a2576d779161769ec'/>
<id>9e808eb6a7689b61399f772a2576d779161769ec</id>
<content type='text'>
Return errors immediately so the straightline path is the normal,
no-error path.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Return errors immediately so the straightline path is the normal,
no-error path.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>PCI: Assign resources before drivers claim devices (pci_scan_root_bus())</title>
<updated>2015-03-19T15:17:13+00:00</updated>
<author>
<name>Yijing Wang</name>
<email>wangyijing@huawei.com</email>
</author>
<published>2015-03-16T03:18:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=b97ea289cf6aff8d4cbcefe2b707bb9b00a73c73'/>
<id>b97ea289cf6aff8d4cbcefe2b707bb9b00a73c73</id>
<content type='text'>
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the
devices on it, and called pci_bus_add_devices(), which made the devices
available for drivers to claim them.

Most callers assigned resources to devices after pci_scan_root_bus()
returns, which may be after drivers have claimed the devices.  This is
incorrect; the PCI core should not change device resources while a driver
is managing the device.

Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any
resource assignment in the callers.

Note that ARM's pci_common_init_dev() already called pci_bus_add_devices()
after pci_scan_root_bus(), so we only need to remove the first call:

  pci_common_init_dev
    pcibios_init_hw
      pci_scan_root_bus
        pci_bus_add_devices        # first call
    pci_bus_assign_resources
    pci_bus_add_devices            # second call

[bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(),
return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(),
return early if xtensa platform_pcibios_fixup() fails]
Signed-off-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Richard Henderson &lt;rth@twiddle.net&gt;
CC: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
CC: Matt Turner &lt;mattst88@gmail.com&gt;
CC: David Howells &lt;dhowells@redhat.com&gt;
CC: Tony Luck &lt;tony.luck@intel.com&gt;
CC: Michal Simek &lt;monstr@monstr.eu&gt;
CC: Ralf Baechle &lt;ralf@linux-mips.org&gt;
CC: Koichi Yasutake &lt;yasutake.koichi@jp.panasonic.com&gt;
CC: Sebastian Ott &lt;sebott@linux.vnet.ibm.com&gt;
CC: "David S. Miller" &lt;davem@davemloft.net&gt;
CC: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
CC: Chris Zankel &lt;chris@zankel.net&gt;
CC: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the
devices on it, and called pci_bus_add_devices(), which made the devices
available for drivers to claim them.

Most callers assigned resources to devices after pci_scan_root_bus()
returns, which may be after drivers have claimed the devices.  This is
incorrect; the PCI core should not change device resources while a driver
is managing the device.

Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any
resource assignment in the callers.

Note that ARM's pci_common_init_dev() already called pci_bus_add_devices()
after pci_scan_root_bus(), so we only need to remove the first call:

  pci_common_init_dev
    pcibios_init_hw
      pci_scan_root_bus
        pci_bus_add_devices        # first call
    pci_bus_assign_resources
    pci_bus_add_devices            # second call

[bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(),
return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(),
return early if xtensa platform_pcibios_fixup() fails]
Signed-off-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Richard Henderson &lt;rth@twiddle.net&gt;
CC: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
CC: Matt Turner &lt;mattst88@gmail.com&gt;
CC: David Howells &lt;dhowells@redhat.com&gt;
CC: Tony Luck &lt;tony.luck@intel.com&gt;
CC: Michal Simek &lt;monstr@monstr.eu&gt;
CC: Ralf Baechle &lt;ralf@linux-mips.org&gt;
CC: Koichi Yasutake &lt;yasutake.koichi@jp.panasonic.com&gt;
CC: Sebastian Ott &lt;sebott@linux.vnet.ibm.com&gt;
CC: "David S. Miller" &lt;davem@davemloft.net&gt;
CC: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
CC: Chris Zankel &lt;chris@zankel.net&gt;
CC: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
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