linux.git/arch/mips, branch v2.6.26-rc7 Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git [MIPS] Au1200: MMC resource size off by one 2008-06-16T14:14:49+00:00 Sergei Shtylyov sshtylyov@ru.mvista.com 2008-05-08T19:06:17+00:00 dab8c6deaf1d654d09c3de8bd4c286d424df255a Au12x0 MMC platform device strangely claims 0x41 bytes for its memory-mapped registers. Make it claim the whole 0x80000 instead according to the memory map given in the datasheets. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Au12x0 MMC platform device strangely claims 0x41 bytes for its
memory-mapped registers.  Make it claim the whole 0x80000 instead according
to the memory map given in the datasheets.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] TANBAC: Update defconfig 2008-06-16T14:14:49+00:00 Yoichi Yuasa yoichi_yuasa@tripeaks.co.jp 2008-06-16T13:54:16+00:00 b185194ef0691c8068c7d764aa8f78899d05512a These boards need cca setup on CMDLINE. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
These boards need cca setup on CMDLINE.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Vr41xx: Initialize PCI io_map_base 2008-06-16T14:14:48+00:00 Yoichi Yuasa yoichi_yuasa@tripeaks.co.jp 2008-06-16T13:51:08+00:00 f1304b358a6c952e4cd1f92c8a6f183b1026c103 Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Malta: Always compile MTD platform device registration code. 2008-06-16T14:14:48+00:00 Ralf Baechle ralf@linux-mips.org 2008-06-15T23:23:39+00:00 b8157180ccd8bb3752f510c6c434b86394636093 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Malta: Fix build errors for 64-bit kernels 2008-06-16T14:14:48+00:00 Thomas Bogendoerfer tsbogend@alpha.franken.de 2008-05-29T20:05:07+00:00 938b2b14172bd098972df2a5157bfabf161c90e5 Fix 64-bit Malta by using CKSEG0ADDR and correct casts. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Fix 64-bit Malta by using CKSEG0ADDR and correct casts.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Lasat: sysctl fixup 2008-06-16T14:14:48+00:00 Thomas Horsten thomas@horsten.com 2008-06-15T01:17:11+00:00 1f34f2e4262bae8a1aa6d8fd6306b07074d33718 LASAT's sysctl interface was broken, it failed a check during boot because a single entry had a sysctl number and the rest were unnumbered. When I fixed it I noticed that the whole sysctl file needed a spring clean, it was using mutexes where it wasn't needed (it's only needed to protect during writes to the EEPROM), so I moved that stuff out and generally cleaned the whole thing up. So now, LASAT's sysctl/proc interface is working again. Signed-off-by: Thomas Horsten <thomas@horsten.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
LASAT's sysctl interface was broken, it failed a check during boot because
a single entry had a sysctl number and the rest were unnumbered. When I
fixed it I noticed that the whole sysctl file needed a spring clean, it was
using mutexes where it wasn't needed (it's only needed to protect during
writes to the EEPROM), so I moved that stuff out and generally cleaned the
whole thing up.

So now, LASAT's sysctl/proc interface is working again.

Signed-off-by: Thomas Horsten <thomas@horsten.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Fix buggy use of kmap_coherent. 2008-06-16T14:14:48+00:00 Ralf Baechle ralf@linux-mips.org 2008-06-14T21:22:08+00:00 c9c5023d83df5dc7d58830a63fd0e082120f00e3 Assuming the call of kmap_coherent in local_r4k_flush_cache_page doesn't need fixing this was skipped in fcae549295bcae801ac48fc1c2030ab8cc487020. Turns out it needed the same change after all. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Assuming the call of kmap_coherent in local_r4k_flush_cache_page doesn't
need fixing this was skipped in fcae549295bcae801ac48fc1c2030ab8cc487020.
Turns out it needed the same change after all.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Lasat: bring back from the dead 2008-06-16T14:14:48+00:00 Thomas Horsten thomas@horsten.com 2008-06-14T01:32:42+00:00 0c3bd83b0974238a5808d342663c6407512564d0 After the common MIPS CPU interrupt controller (for irq0-7) was introduced the Lasat boards didn't get their interrupts right, so nothing worked. The old routines need to be offset by the new 8 hardware interrupts common to all MIPS CPU's. Signed-off-by: Thomas Horsten <thomas@horsten.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
After the common MIPS CPU interrupt controller (for irq0-7) was introduced
the Lasat boards didn't get their interrupts right, so nothing worked. The
old routines need to be offset by the new 8 hardware interrupts common to
all MIPS CPU's.

Signed-off-by: Thomas Horsten <thomas@horsten.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Export smp_call_function and smp_call_function_single. 2008-06-16T14:14:47+00:00 Zenon Fortuna zenon@mips.com 2008-05-17T00:29:48+00:00 a9ad02bdbb0193203a477bbd0e833adf9fb29ac4 Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[MIPS] Bring the SWARM defconfig up to date 2008-06-16T14:14:47+00:00 Maciej W. Rozycki macro@linux-mips.org 2008-06-12T23:10:00+00:00 461a082f870c7fc6a0a245e2f93c9f0e3afbeddd The SWARM defconfig file has not been regenerated for over a year now. Here is a patch to bring the file up to date. Additionally some important and sometimes confusing changes happened meanwhile. Here is the list of notable corresponding updates to the configuration: 1. CPU_SB1_PASS_2_2 is now selected rather than CPU_SB1_PASS_1. The latter requires a non-standard -msb1-pass1-workarounds option to be supported by GCC and I am told is quite rare anyway. [Ralf: Afaik -msb1-pass1-workarounds is available only in Monta Vista's special Sibyte gcc 3.0 variant and gcc 3.0 is too old to build a modern kernel anyway.] 2. PHYLIB and BROADCOM_PHY are both built in and NETDEV_1000 enabled as required by SB1250_MAC. 3. USB and USB_OHCI_HCD are enabled as there is an OHCI chip onboard. 4. TMPFS is enabled, because I use it. ;-) Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> 
 The SWARM defconfig file has not been regenerated for over a year now.
Here is a patch to bring the file up to date.  Additionally some important
and sometimes confusing changes happened meanwhile.  Here is the list of
notable corresponding updates to the configuration:

1. CPU_SB1_PASS_2_2 is now selected rather than CPU_SB1_PASS_1.  The
   latter requires a non-standard -msb1-pass1-workarounds option to be
   supported by GCC and I am told is quite rare anyway.

   [Ralf: Afaik -msb1-pass1-workarounds is available only in Monta Vista's
   special Sibyte gcc 3.0 variant and gcc 3.0 is too old to build a modern
   kernel anyway.]

2. PHYLIB and BROADCOM_PHY are both built in and NETDEV_1000 enabled as
   required by SB1250_MAC.

3. USB and USB_OHCI_HCD are enabled as there is an OHCI chip onboard.

4. TMPFS is enabled, because I use it. ;-)

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>