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<title>linux.git/arch/powerpc/sysdev/mpic.c, branch v2.6.26-rc7</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>[POWERPC] mpic: Fix use of uninitialized variable</title>
<updated>2008-05-23T06:15:37+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2008-05-21T06:24:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=06a901c5621f85e07e00ac4816c7ca95620ee74a'/>
<id>06a901c5621f85e07e00ac4816c7ca95620ee74a</id>
<content type='text'>
Compiling ppc64_defconfig with gcc 4.3 gives thes warnings:

arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_get_priority':
arch/powerpc/sysdev/mpic.c:1351: warning: 'is_ipi' may be used uninitialized in this function
arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_set_priority':
arch/powerpc/sysdev/mpic.c:1328: warning: 'is_ipi' may be used uninitialized in this function

It turns out that in the cases where is_ipi is uninitialized, another
variable (mpic) will be NULL and it is dereferenced.  Protect against
this by returning if mpic is NULL in mpic_irq_set_priority, and removing
mpic_irq_get_priority completely as it has no in tree callers.

This has the nice side effect of making the warning go away.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
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<pre>
Compiling ppc64_defconfig with gcc 4.3 gives thes warnings:

arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_get_priority':
arch/powerpc/sysdev/mpic.c:1351: warning: 'is_ipi' may be used uninitialized in this function
arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_set_priority':
arch/powerpc/sysdev/mpic.c:1328: warning: 'is_ipi' may be used uninitialized in this function

It turns out that in the cases where is_ipi is uninitialized, another
variable (mpic) will be NULL and it is dereferenced.  Protect against
this by returning if mpic is NULL in mpic_irq_set_priority, and removing
mpic_irq_get_priority completely as it has no in tree callers.

This has the nice side effect of making the warning go away.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] kexec: MPIC ack interrupts at mpic_teardown_this_cpu()</title>
<updated>2008-04-07T14:16:29+00:00</updated>
<author>
<name>Valentine Barshak</name>
<email>vbarshak@ru.mvista.com</email>
</author>
<published>2008-04-03T19:09:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=7132799b0e49c48cf119dbe02d20810860d20991'/>
<id>7132799b0e49c48cf119dbe02d20810860d20991</id>
<content type='text'>
We really need to ack interrupts at mpic_teardown, since
not all platforms reset mpic at kernel start-up. For example,
kexec'ed kernel hangs on P.A. Semi if mpic_eoi() isn't called.

Signed-off-by: Valentine Barshak &lt;vbarshak@ru.mvista.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
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<pre>
We really need to ack interrupts at mpic_teardown, since
not all platforms reset mpic at kernel start-up. For example,
kexec'ed kernel hangs on P.A. Semi if mpic_eoi() isn't called.

Signed-off-by: Valentine Barshak &lt;vbarshak@ru.mvista.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] mpic: Make sparse happy</title>
<updated>2008-02-26T11:17:03+00:00</updated>
<author>
<name>Johannes Berg</name>
<email>johannes@sipsolutions.net</email>
</author>
<published>2008-02-21T09:39:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=d9d1063d47cbfe45f8b369475a35c3cdd64fb69c'/>
<id>d9d1063d47cbfe45f8b369475a35c3cdd64fb69c</id>
<content type='text'>
I was running sparse on something else and noticed sparse warnings
and especially the bogus code that is fixed by the first hunk of
this patch, so I fixed them all while at it.

Signed-off-by: Johannes Berg &lt;johannes@sipsolutions.net&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Milton Miller &lt;miltonm@bga.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
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<pre>
I was running sparse on something else and noticed sparse warnings
and especially the bogus code that is fixed by the first hunk of
this patch, so I fixed them all while at it.

Signed-off-by: Johannes Berg &lt;johannes@sipsolutions.net&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Milton Miller &lt;miltonm@bga.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'linux-2.6'</title>
<updated>2008-01-31T00:25:51+00:00</updated>
<author>
<name>Paul Mackerras</name>
<email>paulus@samba.org</email>
</author>
<published>2008-01-31T00:25:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=bd45ac0c5daae35e7c71138172e63df5cf644cf6'/>
<id>bd45ac0c5daae35e7c71138172e63df5cf644cf6</id>
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</content>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Driver core: change sysdev classes to use dynamic kobject names</title>
<updated>2008-01-25T04:40:40+00:00</updated>
<author>
<name>Kay Sievers</name>
<email>kay.sievers@vrfy.org</email>
</author>
<published>2007-12-20T01:09:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=af5ca3f4ec5cc4432a42a73b050dd8898ce8fd00'/>
<id>af5ca3f4ec5cc4432a42a73b050dd8898ce8fd00</id>
<content type='text'>
All kobjects require a dynamically allocated name now. We no longer
need to keep track if the name is statically assigned, we can just
unconditionally free() all kobject names on cleanup.

Signed-off-by: Kay Sievers &lt;kay.sievers@vrfy.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

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<pre>
All kobjects require a dynamically allocated name now. We no longer
need to keep track if the name is statically assigned, we can just
unconditionally free() all kobject names on cleanup.

Signed-off-by: Kay Sievers &lt;kay.sievers@vrfy.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Fixup use of phys_addr_t in mpic code</title>
<updated>2008-01-24T01:32:33+00:00</updated>
<author>
<name>Becky Bruce</name>
<email>becky.bruce@freescale.com</email>
</author>
<published>2008-01-15T02:56:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=c51a3fdc0a950dc65b4d552497e54cf60677f8a5'/>
<id>c51a3fdc0a950dc65b4d552497e54cf60677f8a5</id>
<content type='text'>
The mpic_map() and __mpic_map_mmio() need to use phys_addr_t for the
physical address they are passed.

Signed-off-by: Becky Bruce &lt;becky.bruce@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
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<pre>
The mpic_map() and __mpic_map_mmio() need to use phys_addr_t for the
physical address they are passed.

Signed-off-by: Becky Bruce &lt;becky.bruce@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Distribute interrupts evenly across cpus</title>
<updated>2007-12-28T15:22:25+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-12-28T04:16:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=d87bf3bed71375b141e95b5fdbac413ac4b65184'/>
<id>d87bf3bed71375b141e95b5fdbac413ac4b65184</id>
<content type='text'>
By default the OpenPIC on PWRficient will bias to one core (since that
will improve changes of the other core being able to stay idle/powered
down). However, this conflicts with most irq load balancing schemes,
since setting an interrupt to be delivered to either core doesn't really
result in the load being shared. It also doesn't work well with the
soft irq disable feature of PPC, since EE will stay on until the first
interrupt is taken while soft disabled.

Set the gconf0 config bit that enables even distribution of interrupts
among the two cores.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
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<pre>
By default the OpenPIC on PWRficient will bias to one core (since that
will improve changes of the other core being able to stay idle/powered
down). However, this conflicts with most irq load balancing schemes,
since setting an interrupt to be delivered to either core doesn't really
result in the load being shared. It also doesn't work well with the
soft irq disable feature of PPC, since EE will stay on until the first
interrupt is taken while soft disabled.

Set the gconf0 config bit that enables even distribution of interrupts
among the two cores.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Implement NMI support</title>
<updated>2007-12-28T15:22:24+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-12-20T19:11:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=f365355e65ee619e3b7baeca69b46fd2c4a5ec68'/>
<id>f365355e65ee619e3b7baeca69b46fd2c4a5ec68</id>
<content type='text'>
Some PWRficient-based boards have a NMI button that's wired up to a GPIO
as interrupt source. By configuring the openpic accordingly, these get
delivered as a machine check with high priority, instead of as an external
interrupt.

The device tree contains a property "nmi-source" in the openpic node
for these systems, and it's the (hwirq) source for the input.

Also, for these interrupts, the IACK is read from another register than
the regular (MCACK instead), but they are EOI'd as usual. So implement
said function for the mpic driver.

Finally, move a couple of external function defines to include/ instead
of local under sysdev. Being able to mask/unmask and eoi directly saves
us from setting up a dummy irq handler that will never be called.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
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<pre>
Some PWRficient-based boards have a NMI button that's wired up to a GPIO
as interrupt source. By configuring the openpic accordingly, these get
delivered as a machine check with high priority, instead of as an external
interrupt.

The device tree contains a property "nmi-source" in the openpic node
for these systems, and it's the (hwirq) source for the input.

Also, for these interrupts, the IACK is read from another register than
the regular (MCACK instead), but they are EOI'd as usual. So implement
said function for the mpic driver.

Finally, move a couple of external function defines to include/ instead
of local under sysdev. Being able to mask/unmask and eoi directly saves
us from setting up a dummy irq handler that will never be called.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Implement MSI support</title>
<updated>2007-12-20T05:15:23+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-12-12T06:44:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=38958dd9113c19cd7a927009ae585bd5aba3295e'/>
<id>38958dd9113c19cd7a927009ae585bd5aba3295e</id>
<content type='text'>
Implement MSI support for PA Semi PWRficient platforms. MSI is done
through a special range of sources on the openpic controller, and they're
unfortunately breaking the usual concepts of how sources are programmed:

* The source is calculated as 512 + the value written into the MSI
  register
* The vector for this source is added to the source and reported
  through IACK

This means that for simplicity, it makes much more sense to just set the
vector to 0 for the source, since that's really the vector we expect to
see from IACK.

Also, the affinity/priority registers will affect 16 sources at a
time. To avoid most (simple) users from being limited by this, allocate
16 sources per device but use only one. This means that there's a total
of 32 sources.

If we get usage scenarions that need more sources, the allocator should
probably be revised to take an alignment argument and size, not just do
natural alignment.

Finally, since I'm already touching the MPIC names on pasemi, rename
the base one from the somewhat odd " PAS-OPIC  " to "PASEMI-OPIC".

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement MSI support for PA Semi PWRficient platforms. MSI is done
through a special range of sources on the openpic controller, and they're
unfortunately breaking the usual concepts of how sources are programmed:

* The source is calculated as 512 + the value written into the MSI
  register
* The vector for this source is added to the source and reported
  through IACK

This means that for simplicity, it makes much more sense to just set the
vector to 0 for the source, since that's really the vector we expect to
see from IACK.

Also, the affinity/priority registers will affect 16 sources at a
time. To avoid most (simple) users from being limited by this, allocate
16 sources per device but use only one. This means that there's a total
of 32 sources.

If we get usage scenarions that need more sources, the allocator should
probably be revised to take an alignment argument and size, not just do
natural alignment.

Finally, since I'm already touching the MPIC names on pasemi, rename
the base one from the somewhat odd " PAS-OPIC  " to "PASEMI-OPIC".

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] MPIC: Minor optimization of ipi handler</title>
<updated>2007-12-20T05:11:46+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-10-19T23:49:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=194046a17ee2600908541bc9cd5d6d421805f132'/>
<id>194046a17ee2600908541bc9cd5d6d421805f132</id>
<content type='text'>
Optimize MPIC IPIs, by passing in the IPI number as the argument to the
handler, since all we did was translate it back based on which mpic
the interrupt came though on (and that was always the primary mpic).

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Optimize MPIC IPIs, by passing in the IPI number as the argument to the
handler, since all we did was translate it back based on which mpic
the interrupt came though on (and that was always the primary mpic).

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
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