linux.git/arch/riscv/Kconfig.erratas, branch master

riscv: Rename Kconfig.erratas to Kconfig.errata

2023-03-15T03:51:21+00:00

Errata is already plural for erratum. Rename it to make the
grammar gooder.

Signed-off-by: Andrew Jones 
Reviewed-by: Conor Dooley 
Reviewed-by: Heiko Stuebner 
Link: https://lore.kernel.org/r/20230224154601.88163-3-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt

drivers/perf: riscv_pmu_sbi: add support for PMU variant on T-Head C9xx cores

2022-10-27T21:35:20+00:00

With the T-HEAD C9XX cores being designed before or during the ratification
to the SSCOFPMF extension, it implements functionality very similar but
not equal to it.

It implements overflow handling and also some privilege-mode filtering.
While SSCOFPMF supports this for all modes, the C9XX only implements the
filtering for M-mode and S-mode but not user-mode.

So add some adaptions to allow the C9XX to still handle
its PMU through the regular SBI PMU interface instead of defining new
interfaces or drivers.

To work properly, this requires a matching change in SBI, though the actual
interface between kernel and SBI does not change.

The main differences are a the overflow CSR and irq number.

As the reading of the overflow-csr is in the hot-path during irq handling,
use an errata and alternatives to not introduce new conditionals there.

Reviewed-by: Andrew Jones 
Reviewed-by: Conor Dooley 
Signed-off-by: Heiko Stuebner 
Link: https://lore.kernel.org/all/20221011231841.2951264-2-heiko@sntech.de/
Signed-off-by: Palmer Dabbelt

riscv: make t-head erratas depend on MMU

2022-09-17T08:48:22+00:00

Both basic extensions of SVPBMT and ZICBOM depend on CONFIG_MMU.
Make the T-Head errata implementations of the similar functionality
also depend on it to prevent build errors.

Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
Fixes: d20ec7529236 ("riscv: implement cache-management errata for T-Head SoCs")
Reported-by: kernel test robot 
Signed-off-by: Heiko Stuebner 
Reviewed-by: Guo Ren 
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220907154932.2858518-1-heiko@sntech.de
Signed-off-by: Palmer Dabbelt

riscv: implement Zicbom-based CMO instructions + the t-head variant

2022-08-11T03:49:32+00:00

This series is based on the alternatives changes done in my svpbmt
series and thus also depends on Atish's isa-extension parsing series.

It implements using the cache-management instructions from the  Zicbom-
extension to handle cache flush, etc actions on platforms needing them.

SoCs using cpu cores from T-Head like the Allwinne D1 implement a
different set of cache instructions. But while they are different,
instructions they provide the same functionality, so a variant can easly
hook into the existing alternatives mechanism on those.

[Palmer:  Some minor fixups, including a RISCV_ISA_ZICBOM dependency on
MMU that's probably not strictly necessary.  The Zicbom support will
trip up sparse for users that have new toolchains, I just sent a patch.]

Link: https://lore.kernel.org/all/20220706231536.2041855-1-heiko@sntech.de/
Link: https://lore.kernel.org/linux-sparse/20220811033138.20676-1-palmer@rivosinc.com/T/#u

* palmer/riscv-zicbom:
  riscv: implement cache-management errata for T-Head SoCs
  riscv: Add support for non-coherent devices using zicbom extension
  dt-bindings: riscv: document cbom-block-size
  of: also handle dma-noncoherent in of_dma_is_coherent()

riscv: implement cache-management errata for T-Head SoCs

2022-08-04T00:29:59+00:00

The T-Head C906 and C910 implement a scheme for handling
cache operations different from the generic Zicbom extension.

Add an errata for it next to the generic dma coherency ops.

Reviewed-by: Samuel Holland 
Tested-by: Samuel Holland 
Reviewed-by: Guo Ren 
Signed-off-by: Heiko Stuebner 
Link: https://lore.kernel.org/r/20220706231536.2041855-5-heiko@sntech.de
Signed-off-by: Palmer Dabbelt

riscv: Kconfig: Style cleanups

2022-07-01T02:26:16+00:00

The majority of the Kconfig files use a single tab for basic indentation
and a single tab followed by two whitespaces for help text indentation.
Fix the lines that don't follow this convention.

While at it, add trailing comments to endif/endmenu statements for
better readability.

* 'riscv-kconfig_cleanups' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
  riscv: Kconfig.socs: Add comments
  riscv: Kconfig.erratas: Add comments
  riscv: Kconfig: Fix indentation and add comments

riscv: Kconfig.erratas: Add comments

2022-06-30T23:34:19+00:00

Add trailing comments to endmenu statements for better readability.

Signed-off-by: Juerg Haefliger 
Link: https://lore.kernel.org/r/20220520120232.148310-3-juergh@canonical.com
Signed-off-by: Palmer Dabbelt

riscv: fix dependency for t-head errata

2022-06-16T22:42:55+00:00

alternatives only work correctly on non-xip-kernels and while the
selected alternative-symbol has the correct dependency the symbol
selecting it also needs that dependency.

So add the missing dependency to the T-Head errata Kconfig symbol.

Reported-by: kernel test robot 
Reviewed-by: Guo Ren 
Signed-off-by: Heiko Stuebner 
Link: https://lore.kernel.org/r/20220526205646.258337-5-heiko@sntech.de
Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
Signed-off-by: Palmer Dabbelt

riscv: add memory-type errata for T-Head

2022-05-12T04:36:33+00:00

Some current cpus based on T-Head cores implement memory-types
way different than described in the svpbmt spec even going
so far as using PTE bits marked as reserved.

Add the T-Head vendor-id and necessary errata code to
replace the affected instructions.

Signed-off-by: Heiko Stuebner 
Tested-by: Samuel Holland 
Link: https://lore.kernel.org/r/20220511192921.2223629-13-heiko@sntech.de
Signed-off-by: Palmer Dabbelt

riscv: integrate alternatives better into the main architecture

2022-05-12T04:36:31+00:00

Right now the alternatives need to be explicitly enabled and
erratas are limited to SiFive ones.

We want to use alternatives not only for patching soc erratas,
but in the future also for handling different behaviour depending
on the existence of future extensions.

So move the core alternatives over to the kernel subdirectory
and move the CONFIG_RISCV_ALTERNATIVE to be a hidden symbol
which we expect relevant erratas and extensions to just select
if needed.

Signed-off-by: Heiko Stuebner 
Reviewed-by: Philipp Tomsich 
Link: https://lore.kernel.org/r/20220511192921.2223629-2-heiko@sntech.de
Signed-off-by: Palmer Dabbelt