linux.git/arch/sh/include/asm/processor.h, branch v2.6.35-rc4

sh: cache secondary CPUs idle loop.

2010-04-26T09:59:47+00:00

This provides a cache of the secondary CPUs idle loop for the cases where
hotplug simply enters a low power state instead of resetting or powering
off the core.

Signed-off-by: Paul Mundt

sh: __cpuinit annotate the CPU init path.

2010-04-21T03:20:42+00:00

All of the regular CPU init path needs to be __cpuinit annotated for CPU
hotplug.

Signed-off-by: Paul Mundt

sh: Tidy CPU probing and fixup section annotations.

2010-04-21T03:01:06+00:00

This does a detect_cpu_and_cache_system() -> cpu_probe() rename, tidies
up the unused return value, and stuffs it under __cpuinit in preparation
for CPU hotplug.

Signed-off-by: Paul Mundt

sh: wire up SET/GET_UNALIGN_CTL.

2010-02-23T03:56:30+00:00

This hooks up the SET/GET_UNALIGN_CTL knobs cribbing the bulk of it from
the PPC and ia64 implementations. The thread flags happen to be the
logical inverse of what the global fault mode is set to, so this works
out pretty cleanly. By default the global fault mode is used, with tasks
now being able to override their own settings via prctl().

Signed-off-by: Paul Mundt

sh64: Fix up the build for the thread_xstate changes.

2010-01-19T06:40:03+00:00

This updates the sh64 processor info with the sh32 changes in order to
tie in to the generic task_xstate management code.

Signed-off-by: Paul Mundt

sh: Handle early ioremaps through fixed mappings.

2010-01-18T12:08:32+00:00

This adds in a mem_init_done to work out when a standard ioremap() is
possible, falling back to the fixmap based ioremap otherwise.

Signed-off-by: Paul Mundt

Merge branch 'master' into sh/smp

2009-09-01T04:54:14+00:00

Conflicts:
	arch/sh/mm/cache-sh4.c

sh: Add initial support for SH7757 CPU subtype

2009-08-21T08:25:47+00:00

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Paul Mundt

sh: Track the CPU family in sh_cpuinfo.

2009-08-15T01:48:13+00:00

This adds a family member to struct sh_cpuinfo, which allows us to fall
back more on the probe routines to work out what sort of subtype we are
running on. This will be used by the CPU cache initialization code in
order to first do family-level initialization, followed by subtype-level
optimizations.

Signed-off-by: Paul Mundt

sh: rework mode pin code

2009-06-11T06:08:53+00:00

This patch reworks the mode pin code to keep the pin
definitions in one place. The mode pins values are now
the value of the bit instead of bit number.

With this patch in place the sh7785 header file contains
mode pin comments. The sh7785 clock code and the sh7785lcr
board code are updated to reflect the new shared mode pins.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt