linux.git/arch/sh/kernel/process.c, branch v2.6.22-rc4

sh: sr.bl toggling around idle sleep.

2007-05-21T05:34:25+00:00

As pointed out by Saito-san, without the sr.bl manipulation we can
occasionally hit delays in the idle loop due to interrupt handling, so
ensure that interrupts are blocked before going to sleep.

At the same time, we throw in TIF_POLLING_NRFLAG for the !hlt_counter
case (primarily used by the ST-40 parts).

Signed-off-by: Paul Mundt

sh: clockevent/clocksource/hrtimers/nohz TMU support.

2007-05-09T08:33:24+00:00

This adds basic support for clockevents and clocksources,
presently only implemented for TMU-based systems (which
are the majority of SH-3 and SH-4 systems).

The old NO_IDLE_HZ implementation is also dropped completely,
the only users of this were on TMU-based systems anyways.

More work needs to be done to generalize the TMU handling,
in that the current implementation is rather tied to the
notion of TMU0 and TMU1 utilization.

Additionally, as more SH timers switch over to this scheme,
we'll be able to gut most of the remaining system timer
infrastructure that existed before.

Signed-off-by: Paul Mundt

sh: Convert to common die chain.

2007-05-09T01:55:38+00:00

This went in immediately after SH added the die chain notifiers,
so move over to that instead..

Signed-off-by: Paul Mundt

sh: Fix PC adjustments for varying opcode length.

2007-05-09T01:35:01+00:00

There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.

In the cases where we aren't rewinding, this is much less ugly..

We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.

Signed-off-by: Paul Mundt

sh: Support for SH-2A 32-bit opcodes.

2007-05-09T01:35:01+00:00

SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.

Signed-off-by: Paul Mundt

sh: generic quicklist support.

2007-05-09T01:35:00+00:00

This moves SH over to the generic quicklists. As per x86_64,
we have special mappings for the PGDs, so these go on their
own list..

Signed-off-by: Paul Mundt

sh: Add die chain notifiers.

2007-05-07T02:11:57+00:00

Add the atomic die chains in, kprobes needs these.

Signed-off-by: Paul Mundt

sh: MS7712SE01 board support.

2007-05-07T02:10:54+00:00

Support the SH7712 (SH3-DSP) Solution Engine reference board.

Signed-off-by: Nobuhiro Iwamatsu 
Signed-off-by: Paul Mundt

sh: Fix kernel thread stack corruption with preempt.

2007-03-05T05:13:26+00:00

When I run a preemptive kernel-2.6.20 for SH7780, a created
kthread(pdflush) can not exit by do_exit() in kernel_thread_helper. I
think that the created kthread should have a room for 'struct pt_regs'
space on the stack top, because __switch_to() will refer to the space as
follows using 'regs = task_pt_regs(prev)' and next condition may be true.

Signed-off-by: Hideo Saito 
Signed-off-by: Paul Mundt

sh: Fixup cpu_data references for the non-boot CPUs.

2007-02-13T01:54:45+00:00

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt