<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/x86/kernel/setup.c, branch v3.18.72</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>x86: Store a per-cpu shadow copy of CR4</title>
<updated>2015-06-28T17:39:27+00:00</updated>
<author>
<name>Andy Lutomirski</name>
<email>luto@amacapital.net</email>
</author>
<published>2014-10-24T22:58:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=63753fac67e11fb6bac3d5c6a48bd319d9e612c2'/>
<id>63753fac67e11fb6bac3d5c6a48bd319d9e612c2</id>
<content type='text'>
[ Upstream commit 1e02ce4cccdcb9688386e5b8d2c9fa4660b45389 ]

Context switches and TLB flushes can change individual bits of CR4.
CR4 reads take several cycles, so store a shadow copy of CR4 in a
per-cpu variable.

To avoid wasting a cache line, I added the CR4 shadow to
cpu_tlbstate, which is already touched in switch_mm.  The heaviest
users of the cr4 shadow will be switch_mm and __switch_to_xtra, and
__switch_to_xtra is called shortly after switch_mm during context
switch, so the cacheline is likely to be hot.

Signed-off-by: Andy Lutomirski &lt;luto@amacapital.net&gt;
Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Vince Weaver &lt;vince@deater.net&gt;
Cc: "hillf.zj" &lt;hillf.zj@alibaba-inc.com&gt;
Cc: Valdis Kletnieks &lt;Valdis.Kletnieks@vt.edu&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 1e02ce4cccdcb9688386e5b8d2c9fa4660b45389 ]

Context switches and TLB flushes can change individual bits of CR4.
CR4 reads take several cycles, so store a shadow copy of CR4 in a
per-cpu variable.

To avoid wasting a cache line, I added the CR4 shadow to
cpu_tlbstate, which is already touched in switch_mm.  The heaviest
users of the cr4 shadow will be switch_mm and __switch_to_xtra, and
__switch_to_xtra is called shortly after switch_mm during context
switch, so the cacheline is likely to be hot.

Signed-off-by: Andy Lutomirski &lt;luto@amacapital.net&gt;
Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Vince Weaver &lt;vince@deater.net&gt;
Cc: "hillf.zj" &lt;hillf.zj@alibaba-inc.com&gt;
Cc: Valdis Kletnieks &lt;Valdis.Kletnieks@vt.edu&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, cma: Reserve DMA contiguous area after initmem_init()</title>
<updated>2014-10-28T06:36:50+00:00</updated>
<author>
<name>Weijie Yang</name>
<email>weijie.yang@samsung.com</email>
</author>
<published>2014-10-24T09:00:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3c325f8233c35fb35dec3744ba01634aab4ea36a'/>
<id>3c325f8233c35fb35dec3744ba01634aab4ea36a</id>
<content type='text'>
Fengguang Wu reported a boot crash on the x86 platform
via the 0-day Linux Kernel Performance Test:

  cma: dma_contiguous_reserve: reserving 31 MiB for global area
  BUG: Int 6: CR2   (null)
  [&lt;41850786&gt;] dump_stack+0x16/0x18
  [&lt;41d2b1db&gt;] early_idt_handler+0x6b/0x6b
  [&lt;41072227&gt;] ? __phys_addr+0x2e/0xca
  [&lt;41d4ee4d&gt;] cma_declare_contiguous+0x3c/0x2d7
  [&lt;41d6d359&gt;] dma_contiguous_reserve_area+0x27/0x47
  [&lt;41d6d4d1&gt;] dma_contiguous_reserve+0x158/0x163
  [&lt;41d33e0f&gt;] setup_arch+0x79b/0xc68
  [&lt;41d2b7cf&gt;] start_kernel+0x9c/0x456
  [&lt;41d2b2ca&gt;] i386_start_kernel+0x79/0x7d

(See details at: https://lkml.org/lkml/2014/10/8/708)

It is because dma_contiguous_reserve() is called before
initmem_init() in x86, the variable high_memory is not
initialized but accessed by __pa(high_memory) in
dma_contiguous_reserve().

This patch moves dma_contiguous_reserve() after initmem_init()
so that high_memory is initialized before accessed.

Reported-by: Fengguang Wu &lt;fengguang.wu@intel.com&gt;
Signed-off-by: Weijie Yang &lt;weijie.yang@samsung.com&gt;
Acked-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Acked-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Acked-by: Michal Nazarewicz &lt;mina86@mina86.com&gt;
Cc: iamjoonsoo.kim@lge.com
Cc: 'Linux-MM' &lt;linux-mm@kvack.org&gt;
Cc: 'Weijie Yang' &lt;weijie.yang.kh@gmail.com&gt;
Link: http://lkml.kernel.org/r/000101cfef69%2431e528a0%2495af79e0%24%25yang@samsung.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fengguang Wu reported a boot crash on the x86 platform
via the 0-day Linux Kernel Performance Test:

  cma: dma_contiguous_reserve: reserving 31 MiB for global area
  BUG: Int 6: CR2   (null)
  [&lt;41850786&gt;] dump_stack+0x16/0x18
  [&lt;41d2b1db&gt;] early_idt_handler+0x6b/0x6b
  [&lt;41072227&gt;] ? __phys_addr+0x2e/0xca
  [&lt;41d4ee4d&gt;] cma_declare_contiguous+0x3c/0x2d7
  [&lt;41d6d359&gt;] dma_contiguous_reserve_area+0x27/0x47
  [&lt;41d6d4d1&gt;] dma_contiguous_reserve+0x158/0x163
  [&lt;41d33e0f&gt;] setup_arch+0x79b/0xc68
  [&lt;41d2b7cf&gt;] start_kernel+0x9c/0x456
  [&lt;41d2b2ca&gt;] i386_start_kernel+0x79/0x7d

(See details at: https://lkml.org/lkml/2014/10/8/708)

It is because dma_contiguous_reserve() is called before
initmem_init() in x86, the variable high_memory is not
initialized but accessed by __pa(high_memory) in
dma_contiguous_reserve().

This patch moves dma_contiguous_reserve() after initmem_init()
so that high_memory is initialized before accessed.

Reported-by: Fengguang Wu &lt;fengguang.wu@intel.com&gt;
Signed-off-by: Weijie Yang &lt;weijie.yang@samsung.com&gt;
Acked-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Acked-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Acked-by: Michal Nazarewicz &lt;mina86@mina86.com&gt;
Cc: iamjoonsoo.kim@lge.com
Cc: 'Linux-MM' &lt;linux-mm@kvack.org&gt;
Cc: 'Weijie Yang' &lt;weijie.yang.kh@gmail.com&gt;
Link: http://lkml.kernel.org/r/000101cfef69%2431e528a0%2495af79e0%24%25yang@samsung.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Quark: Comment setup_arch() to document TLB/PGE bug</title>
<updated>2014-10-08T08:07:46+00:00</updated>
<author>
<name>Bryan O'Donoghue</name>
<email>pure.logic@nexus-software.ie</email>
</author>
<published>2014-10-07T00:19:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2075244f9b871f18a007935c73d2ab49d4fb43e0'/>
<id>2075244f9b871f18a007935c73d2ab49d4fb43e0</id>
<content type='text'>
Quark SoC X1000 advertises Page Global Enable for it's
Translation Lookaside Buffer via cpuid. The silicon does not
in fact support PGE and hence will not flush the TLB when CR4.PGE
is rewritten. The Quark documentation makes clear the necessity to
instead rewrite CR3 in order to flush any TLB entries, irrespective
of the state of CR4.PGE or an individual PTE.PGE

See Intel Quark Core DevMan_001.pdf section 6.4.11

In setup.c setup_arch() the code will load_cr3() and then do a
__flush_tlb_all().

On Quark the entire TLB will be flushed at the load_cr3().
The __flush_tlb_all() have no effect and can be safely ignored.

Later on in the boot process we switch off the flag for cpu_has_pge()
which means that subsequent calls to __flush_tlb_all() will
call __flush_tlb() not __flush_tlb_global() flushing the TLB in the
correct way via load_cr3() not CR4.PGE rewrite

This patch documents the behaviour of flushing the TLB for Quark in
setup_arch()

Comment text suggested by Thomas Gleixner

Signed-off-by: Bryan O'Donoghue &lt;pure.logic@nexus-software.ie&gt;
Cc: davej@redhat.com
Cc: hmh@hmh.eng.br
Link: http://lkml.kernel.org/r/1412641189-12415-2-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Quark SoC X1000 advertises Page Global Enable for it's
Translation Lookaside Buffer via cpuid. The silicon does not
in fact support PGE and hence will not flush the TLB when CR4.PGE
is rewritten. The Quark documentation makes clear the necessity to
instead rewrite CR3 in order to flush any TLB entries, irrespective
of the state of CR4.PGE or an individual PTE.PGE

See Intel Quark Core DevMan_001.pdf section 6.4.11

In setup.c setup_arch() the code will load_cr3() and then do a
__flush_tlb_all().

On Quark the entire TLB will be flushed at the load_cr3().
The __flush_tlb_all() have no effect and can be safely ignored.

Later on in the boot process we switch off the flag for cpu_has_pge()
which means that subsequent calls to __flush_tlb_all() will
call __flush_tlb() not __flush_tlb_global() flushing the TLB in the
correct way via load_cr3() not CR4.PGE rewrite

This patch documents the behaviour of flushing the TLB for Quark in
setup_arch()

Comment text suggested by Thomas Gleixner

Signed-off-by: Bryan O'Donoghue &lt;pure.logic@nexus-software.ie&gt;
Cc: davej@redhat.com
Cc: hmh@hmh.eng.br
Link: http://lkml.kernel.org/r/1412641189-12415-2-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/x86: Replace plain strings with constants</title>
<updated>2014-07-18T20:23:59+00:00</updated>
<author>
<name>Daniel Kiper</name>
<email>daniel.kiper@oracle.com</email>
</author>
<published>2014-06-30T17:53:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9402973d49d9a4bc463bba4f609bf8d8247f79e2'/>
<id>9402973d49d9a4bc463bba4f609bf8d8247f79e2</id>
<content type='text'>
We've got constants, so let's use them instead of hard-coded values.

Signed-off-by: Daniel Kiper &lt;daniel.kiper@oracle.com&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We've got constants, so let's use them instead of hard-coded values.

Signed-off-by: Daniel Kiper &lt;daniel.kiper@oracle.com&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cma: add placement specifier for "cma=" kernel parameter</title>
<updated>2014-06-04T23:53:57+00:00</updated>
<author>
<name>Akinobu Mita</name>
<email>akinobu.mita@gmail.com</email>
</author>
<published>2014-06-04T23:06:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=5ea3b1b2f8ad9162684431ce6188102ca4c64b7a'/>
<id>5ea3b1b2f8ad9162684431ce6188102ca4c64b7a</id>
<content type='text'>
Currently, "cma=" kernel parameter is used to specify the size of CMA,
but we can't specify where it is located.  We want to locate CMA below
4GB for devices only supporting 32-bit addressing on 64-bit systems
without iommu.

This enables to specify the placement of CMA by extending "cma=" kernel
parameter.

Examples:
 1. locate 64MB CMA below 4GB by "cma=64M@0-4G"
 2. locate 64MB CMA exact at 512MB by "cma=64M@512M"

Note that the DMA contiguous memory allocator on x86 assumes that
page_address() works for the pages to allocate.  So this change requires
to limit end address of contiguous memory area upto max_pfn_mapped to
prevent from locating it on highmem area by the argument of
dma_contiguous_reserve().

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Cc: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Don Dutile &lt;ddutile@redhat.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Andi Kleen &lt;andi@firstfloor.org&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, "cma=" kernel parameter is used to specify the size of CMA,
but we can't specify where it is located.  We want to locate CMA below
4GB for devices only supporting 32-bit addressing on 64-bit systems
without iommu.

This enables to specify the placement of CMA by extending "cma=" kernel
parameter.

Examples:
 1. locate 64MB CMA below 4GB by "cma=64M@0-4G"
 2. locate 64MB CMA exact at 512MB by "cma=64M@512M"

Note that the DMA contiguous memory allocator on x86 assumes that
page_address() works for the pages to allocate.  So this change requires
to limit end address of contiguous memory area upto max_pfn_mapped to
prevent from locating it on highmem area by the argument of
dma_contiguous_reserve().

Signed-off-by: Akinobu Mita &lt;akinobu.mita@gmail.com&gt;
Cc: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Cc: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Cc: David Woodhouse &lt;dwmw2@infradead.org&gt;
Cc: Don Dutile &lt;ddutile@redhat.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Andi Kleen &lt;andi@firstfloor.org&gt;
Cc: Yinghai Lu &lt;yinghai@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86-nuke-platforms-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2014-04-02T20:15:58+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-04-02T20:15:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=467cbd207abdbfe29514b5804a22661ab6e80dc6'/>
<id>467cbd207abdbfe29514b5804a22661ab6e80dc6</id>
<content type='text'>
Pull x86 old platform removal from Peter Anvin:
 "This patchset removes support for several completely obsolete
  platforms, where the maintainers either have completely vanished or
  acked the removal.  For some of them it is questionable if there even
  exists functional specimens of the hardware"

Geert Uytterhoeven apparently thought this was a April Fool's pull request ;)

* 'x86-nuke-platforms-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, platforms: Remove NUMAQ
  x86, platforms: Remove SGI Visual Workstation
  x86, apic: Remove support for IBM Summit/EXA chipset
  x86, apic: Remove support for ia32-based Unisys ES7000
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 old platform removal from Peter Anvin:
 "This patchset removes support for several completely obsolete
  platforms, where the maintainers either have completely vanished or
  acked the removal.  For some of them it is questionable if there even
  exists functional specimens of the hardware"

Geert Uytterhoeven apparently thought this was a April Fool's pull request ;)

* 'x86-nuke-platforms-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, platforms: Remove NUMAQ
  x86, platforms: Remove SGI Visual Workstation
  x86, apic: Remove support for IBM Summit/EXA chipset
  x86, apic: Remove support for ia32-based Unisys ES7000
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'tip/x86/urgent' into efi-for-mingo</title>
<updated>2014-03-05T17:31:41+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt.fleming@intel.com</email>
</author>
<published>2014-03-05T17:22:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=4fd69331ad227a4d8de26592d017b73e00caca9f'/>
<id>4fd69331ad227a4d8de26592d017b73e00caca9f</id>
<content type='text'>
Conflicts:
	arch/x86/include/asm/efi.h
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Conflicts:
	arch/x86/include/asm/efi.h
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/efi: Quirk out SGI UV</title>
<updated>2014-03-04T23:43:33+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2014-03-04T16:02:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=a5d90c923bcfb9632d998ed06e9569216ad695f3'/>
<id>a5d90c923bcfb9632d998ed06e9569216ad695f3</id>
<content type='text'>
Alex reported hitting the following BUG after the EFI 1:1 virtual
mapping work was merged,

 kernel BUG at arch/x86/mm/init_64.c:351!
 invalid opcode: 0000 [#1] SMP
 Call Trace:
  [&lt;ffffffff818aa71d&gt;] init_extra_mapping_uc+0x13/0x15
  [&lt;ffffffff818a5e20&gt;] uv_system_init+0x22b/0x124b
  [&lt;ffffffff8108b886&gt;] ? clockevents_register_device+0x138/0x13d
  [&lt;ffffffff81028dbb&gt;] ? setup_APIC_timer+0xc5/0xc7
  [&lt;ffffffff8108b620&gt;] ? clockevent_delta2ns+0xb/0xd
  [&lt;ffffffff818a3a92&gt;] ? setup_boot_APIC_clock+0x4a8/0x4b7
  [&lt;ffffffff8153d955&gt;] ? printk+0x72/0x74
  [&lt;ffffffff818a1757&gt;] native_smp_prepare_cpus+0x389/0x3d6
  [&lt;ffffffff818957bc&gt;] kernel_init_freeable+0xb7/0x1fb
  [&lt;ffffffff81535530&gt;] ? rest_init+0x74/0x74
  [&lt;ffffffff81535539&gt;] kernel_init+0x9/0xff
  [&lt;ffffffff81541dfc&gt;] ret_from_fork+0x7c/0xb0
  [&lt;ffffffff81535530&gt;] ? rest_init+0x74/0x74

Getting this thing to work with the new mapping scheme would need more
work, so automatically switch to the old memmap layout for SGI UV.

Acked-by: Russ Anderson &lt;rja@sgi.com&gt;
Cc: Alex Thorlton &lt;athorlton@sgi.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Alex reported hitting the following BUG after the EFI 1:1 virtual
mapping work was merged,

 kernel BUG at arch/x86/mm/init_64.c:351!
 invalid opcode: 0000 [#1] SMP
 Call Trace:
  [&lt;ffffffff818aa71d&gt;] init_extra_mapping_uc+0x13/0x15
  [&lt;ffffffff818a5e20&gt;] uv_system_init+0x22b/0x124b
  [&lt;ffffffff8108b886&gt;] ? clockevents_register_device+0x138/0x13d
  [&lt;ffffffff81028dbb&gt;] ? setup_APIC_timer+0xc5/0xc7
  [&lt;ffffffff8108b620&gt;] ? clockevent_delta2ns+0xb/0xd
  [&lt;ffffffff818a3a92&gt;] ? setup_boot_APIC_clock+0x4a8/0x4b7
  [&lt;ffffffff8153d955&gt;] ? printk+0x72/0x74
  [&lt;ffffffff818a1757&gt;] native_smp_prepare_cpus+0x389/0x3d6
  [&lt;ffffffff818957bc&gt;] kernel_init_freeable+0xb7/0x1fb
  [&lt;ffffffff81535530&gt;] ? rest_init+0x74/0x74
  [&lt;ffffffff81535539&gt;] kernel_init+0x9/0xff
  [&lt;ffffffff81541dfc&gt;] ret_from_fork+0x7c/0xb0
  [&lt;ffffffff81535530&gt;] ? rest_init+0x74/0x74

Getting this thing to work with the new mapping scheme would need more
work, so automatically switch to the old memmap layout for SGI UV.

Acked-by: Russ Anderson &lt;rja@sgi.com&gt;
Cc: Alex Thorlton &lt;athorlton@sgi.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>efi: Move facility flags to struct efi</title>
<updated>2014-03-04T16:16:16+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt.fleming@intel.com</email>
</author>
<published>2014-01-15T13:21:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3e909599215456928e6b42a04f11c2517881570b'/>
<id>3e909599215456928e6b42a04f11c2517881570b</id>
<content type='text'>
As we grow support for more EFI architectures they're going to want the
ability to query which EFI features are available on the running system.
Instead of storing this information in an architecture-specific place,
stick it in the global 'struct efi', which is already the central
location for EFI state.

While we're at it, let's change the return value of efi_enabled() to be
bool and replace all references to 'facility' with 'feature', which is
the usual word used to describe the attributes of the running system.

Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As we grow support for more EFI architectures they're going to want the
ability to query which EFI features are available on the running system.
Instead of storing this information in an architecture-specific place,
stick it in the global 'struct efi', which is already the central
location for EFI state.

While we're at it, let's change the return value of efi_enabled() to be
bool and replace all references to 'facility' with 'feature', which is
the usual word used to describe the attributes of the running system.

Signed-off-by: Matt Fleming &lt;matt.fleming@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, platforms: Remove SGI Visual Workstation</title>
<updated>2014-02-27T16:07:39+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@linux.intel.com</email>
</author>
<published>2014-02-25T20:05:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=c5f9ee3d665a7660b296aa1e91949ae3376f0d07'/>
<id>c5f9ee3d665a7660b296aa1e91949ae3376f0d07</id>
<content type='text'>
The SGI Visual Workstation seems to be dead; remove support so we
don't have to continue maintaining it.

Cc: Andrey Panin &lt;pazke@donpac.ru&gt;
Cc: Michael Reed &lt;mdr@sgi.com&gt;
Link: http://lkml.kernel.org/r/530CFD6C.7040705@zytor.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SGI Visual Workstation seems to be dead; remove support so we
don't have to continue maintaining it.

Cc: Andrey Panin &lt;pazke@donpac.ru&gt;
Cc: Michael Reed &lt;mdr@sgi.com&gt;
Link: http://lkml.kernel.org/r/530CFD6C.7040705@zytor.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
