linux.git/arch, branch v6.12.81

x86/CPU/AMD: Add additional fixed RDSEED microcode revisions

2026-04-11T12:24:53+00:00

[ Upstream commit e1a97a627cd01d73fac5dd054d8f3de601ef2781 ]

Microcode that resolves the RDSEED failure (SB-7055 [1]) has been released for
additional Zen5 models to linux-firmware [2]. Update the zen5_rdseed_microcode
array to cover these new models.

Fixes: e980de2ff109 ("x86/CPU/AMD: Add RDSEED fix for Zen5")
Signed-off-by: Mario Limonciello 
Signed-off-by: Borislav Petkov (AMD) 
Link: https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7055.html [1]
Link: https://gitlab.com/kernel-firmware/linux-firmware/-/commit/6167e5566900cf236f7a69704e8f4c441bc7212a [2]
Link: https://patch.msgid.link/20251113223608.1495655-1-mario.limonciello@amd.com
[ backport: 6.12.y uses a custom check_rdseed_microcode() function with
  a switch statement. Updated the switch cases to include the new
  models and revisions from the upstream patch. ]
Signed-off-by: Daniel Tobias 
Signed-off-by: Greg Kroah-Hartman

s390/cpum_sf: Cap sampling rate to prevent lsctl exception

2026-04-11T12:24:53+00:00

[ Upstream commit 57ad0d4a00f5d3e80f33ba2da8d560c73d83dc22 ]

commit fcc43a7e294f ("s390/configs: Set HZ=1000") changed the interrupt
frequency of the system. On machines with heavy load and many perf event
overflows, this might lead to an exception. Dmesg displays these entries:
  [112.242542] cpum_sf: Loading sampling controls failed: op 1 err -22
One line per CPU online.

The root cause is the CPU Measurement sampling facility overflow
adjustment. Whenever an overflow (too much samples per tick) occurs, the
sampling rate is adjusted and increased. This was done without observing
the maximum sampling rate limit. When the current sampling interval is
higher than the maximum sampling rate limit, the lsctl instruction raises
an exception. The error messages is the result of such an exception.
Observe the upper limit when the new sampling rate is recalculated.

Cc: stable@vger.kernel.org
Fixes: 39d4a501a9ef ("s390/cpum_sf: Adjust sampling interval to avoid hitting sample limits")
Signed-off-by: Thomas Richter 
Reviewed-by: Sumanth Korikkar 
Reviewed-by: Hendrik Brueckner 
Signed-off-by: Vasily Gorbik 
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

s390/perf_cpum_sf: Convert to use try_cmpxchg128()

2026-04-11T12:24:53+00:00

[ Upstream commit e449399ffd295a1202b74a258227193454ef333f ]

Convert cmpxchg128() usages to try_cmpxchg128() in order to generate
slightly better code.

Reviewed-by: Juergen Christ 
Signed-off-by: Heiko Carstens 
Stable-dep-of: 57ad0d4a00f5 ("s390/cpum_sf: Cap sampling rate to prevent lsctl exception")
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

x86/fred: Fix early boot failures on SEV-ES/SNP guests

2026-04-11T12:24:52+00:00

[ Upstream commit 3645eb7e3915990a149460c151a00894cb586253 ]

FRED-enabled SEV-(ES,SNP) guests fail to boot due to the following issues
in the early boot sequence:

* FRED does not have a #VC exception handler in the dispatch logic

* Early FRED #VC exceptions attempt to use uninitialized per-CPU GHCBs
  instead of boot_ghcb

Add X86_TRAP_VC case to fred_hwexc() with a new exc_vmm_communication()
function that provides the unified entry point FRED requires, dispatching
to existing user/kernel handlers based on privilege level. The function is
already declared via DECLARE_IDTENTRY_VC().

Fix early GHCB access by falling back to boot_ghcb in
__sev_{get,put}_ghcb() when per-CPU GHCBs are not yet initialized.

Fixes: 14619d912b65 ("x86/fred: FRED entry/exit and dispatch code")
Signed-off-by: Nikunj A Dadhania 
Signed-off-by: Borislav Petkov (AMD) 
Reviewed-by: Tom Lendacky 
Cc:   # 6.12+
Link: https://patch.msgid.link/20260318075654.1792916-4-nikunj@amd.com
[ applied GHCB early-return changes to core.c instead of noinstr.c ]
Signed-off-by: Sasha Levin 
Signed-off-by: Greg Kroah-Hartman

Revert "LoongArch/orc: Use RCU in all users of __module_address()."

2026-04-11T12:24:46+00:00

This reverts commit 2e6949777d1dbfa5c906a880028680cc3ebe1f68.

Signed-off-by: Sasha Levin

Revert "LoongArch: Remove unnecessary checks for ORC unwinder"

2026-04-11T12:24:46+00:00

This reverts commit 5d8e3b81aee2c18610c5f440936f0bf3b6426e56.

Signed-off-by: Sasha Levin

Revert "LoongArch: Handle percpu handler address for ORC unwinder"

2026-04-11T12:24:46+00:00

This reverts commit 8eeb34ae9d4c743b1fd2cf58f9c51def37091cf5.

Signed-off-by: Sasha Levin

mips: mm: Allocate tlb_vpn array atomically

2026-04-11T12:24:41+00:00

commit 01cc50ea5167bb14117257ec084637abe9e5f691 upstream.

Found by DEBUG_ATOMIC_SLEEP:

  BUG: sleeping function called from invalid context at /include/linux/sched/mm.h:306
  in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
  preempt_count: 1, expected: 0
  RCU nest depth: 0, expected: 0
  no locks held by swapper/1/0.
  irq event stamp: 0
  hardirqs last  enabled at (0): [<0000000000000000>] 0x0
  hardirqs last disabled at (0): [] copy_process+0x75c/0x1b68
  softirqs last  enabled at (0): [] copy_process+0x75c/0x1b68
  softirqs last disabled at (0): [<0000000000000000>] 0x0
  CPU: 1 PID: 0 Comm: swapper/1 Not tainted 6.6.119-d79e757675ec-fct #1
  Stack : 800000000290bad8 0000000000000000 0000000000000008 800000000290bae8
          800000000290bae8 800000000290bc78 0000000000000000 0000000000000000
          ffffffff80c80000 0000000000000001 ffffffff80d8dee8 ffffffff810d09c0
          784bb2a7ec10647d 0000000000000010 ffffffff80a6fd60 8000000001d8a9c0
          0000000000000000 0000000000000000 ffffffff80d90000 0000000000000000
          ffffffff80c9e0e8 0000000007ffffff 0000000000000cc0 0000000000000400
          ffffffffffffffff 0000000000000001 0000000000000002 ffffffffc0149ed8
          fffffffffffffffe 8000000002908000 800000000290bae0 ffffffff80a81b74
          ffffffff80129fb0 0000000000000000 0000000000000000 0000000000000000
          0000000000000000 0000000000000000 ffffffff80129fd0 0000000000000000
          ...
  Call Trace:
  [] show_stack+0x60/0x158
  [] dump_stack_lvl+0x88/0xbc
  [] __might_resched+0x268/0x288
  [] __kmem_cache_alloc_node+0x2e0/0x330
  [] __kmalloc+0x58/0xd0
  [] r4k_tlb_uniquify+0x7c/0x428
  [] tlb_init+0x7c/0x110
  [] per_cpu_trap_init+0x16c/0x1d0
  [] start_secondary+0x28/0x128

Fixes: 231ac951faba ("MIPS: mm: kmalloc tlb_vpn array to avoid stack overflow")
Signed-off-by: Stefan Wiehler 
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Bogendoerfer 
Signed-off-by: Greg Kroah-Hartman

MIPS: Fix the GCC version check for `__multi3' workaround

2026-04-11T12:24:41+00:00

commit ec8bf18814915460d9c617b556bf024efef26613 upstream.

It was only GCC 10 that fixed a MIPS64r6 code generation issue with a
`__multi3' libcall inefficiently produced to perform 64-bit widening
multiplication while suitable machine instructions exist to do such a
calculation.  The fix went in with GCC commit 48b2123f6336 ("re PR
target/82981 (unnecessary __multi3 call for mips64r6 linux kernel)").

Adjust our code accordingly, removing build failures such as:

mips64-linux-ld: lib/math/div64.o: in function `mul_u64_add_u64_div_u64':
div64.c:(.text+0x84): undefined reference to `__multi3'

with the GCC versions affected.

Fixes: ebabcf17bcd7 ("MIPS: Implement __multi3 for GCC7 MIPS64r6 builds")
Reported-by: kernel test robot 
Closes: https://lore.kernel.org/oe-kbuild-all/202601140146.hMLODc6v-lkp@intel.com/
Signed-off-by: Maciej W. Rozycki 
Cc: stable@vger.kernel.org # v4.15+
Reviewed-by: David Laight 
Signed-off-by: Greg Kroah-Hartman

MIPS: SiByte: Bring back cache initialisation

2026-04-11T12:24:41+00:00

commit d62cf1511743526f530a4c169424e50c757f5a5e upstream.

Bring back cache initialisation for Broadcom SiByte SB1 cores, which has
been removed causing the kernel to hang at bootstrap right after:

Dentry cache hash table entries: 524288 (order: 8, 4194304 bytes, linear)
Inode-cache hash table entries: 262144 (order: 7, 2097152 bytes, linear)

The cause of the problem is R4k cache handlers are also used by Broadcom
SiByte SB1 cores, however with a different cache error exception handler
and therefore not using CPU_R4K_CACHE_TLB:

obj-$(CONFIG_CPU_R4K_CACHE_TLB) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_SB1)           += c-r4k.o cerr-sb1.o cex-sb1.o tlb-r4k.o

(from arch/mips/mm/Makefile).

Fixes: bbe4f634f48c ("mips: fix r3k_cache_init build regression")
Signed-off-by: Maciej W. Rozycki 
Cc: stable@vger.kernel.org # v6.8+
Signed-off-by: Thomas Bogendoerfer 
Signed-off-by: Greg Kroah-Hartman