linux.git/drivers/clk/microchip, branch v6.12.80

clk: microchip: core: correct return value on *_get_parent()

2026-03-04T12:21:22+00:00

[ Upstream commit 5df96d141cccb37f0c3112a22fc1112ea48e9246 ]

roclk_get_parent() and sclk_get_parent() has the possibility of
returning -EINVAL, however the framework expects this call to always
succeed since the return value is unsigned.

If there is no parent map defined, then the current value programmed in
the hardware is used. Let's use that same value in the case where
-EINVAL is currently returned.

This index is only used by clk_core_get_parent_by_index(), and it
validates that it doesn't overflow the number of available parents.

Reported-by: kernel test robot 
Reported-by: Dan Carpenter 
Closes: https://lore.kernel.org/r/202512050233.R9hAWsJN-lkp@intel.com/
Signed-off-by: Brian Masney 
Reviewed-by: Claudiu Beznea 
Link: https://lore.kernel.org/r/20251205-clk-microchip-fixes-v3-2-a02190705e47@redhat.com
Signed-off-by: Claudiu Beznea 
Signed-off-by: Sasha Levin

clock, reset: microchip: move all mpfs reset code to the reset subsystem

2024-05-07T21:57:46+00:00

Stephen and Philipp, while reviewing patches, said that all of the aux
device creation and the register read/write code could be moved to the
reset subsystem, leaving the clock driver with no implementations of
reset_* functions at all. Move them.

Suggested-by: Philipp Zabel 
Suggested-by: Stephen Boyd 
Signed-off-by: Conor Dooley 
Link: https://lore.kernel.org/r/20240424-strangle-sharpener-34755c5e6e3e@spud
Signed-off-by: Stephen Boyd

clk: microchip: mpfs: convert MSSPLL outputs to clk_divider

2024-02-06T14:07:18+00:00

After splitting the MSSPLL in two, the PLL outputs have become
open-coded versions of clk_divider. Drop the custom clk ops structs, and
instead use the generic clk_divider_ops.

Signed-off-by: Conor Dooley

clk: microchip: mpfs: add missing MSSPLL outputs

2024-02-06T14:07:18+00:00

The MSSPLL has 4 outputs, of which only the cpu/axi/ahb clock parent is
currently implemented.
Add the CAN clock too, as that'll be needed by the driver for the CAN
controller and uses output 3.
While we are here, the other two missing clocks, used by the eMMC/SD
controller and by the "user crypto".

Signed-off-by: Conor Dooley

clk: microchip: mpfs: setup for using other mss pll outputs

2024-02-06T14:07:18+00:00

Now that the MSSPLL is split, and the "postdiv" divider of the
cpu/AHB/AXI bus clock is represented by its own "hw" struct, make the
shifts, register offset and width a parameter of the initialisation
macro, rather than using defines that only work for one of the four
outputs.
Configuring this at initialisaion paves the way for using the other
three output clocks, where the register offset, and the bit shift
within that register, will differ.

Signed-off-by: Conor Dooley

clk: microchip: mpfs: split MSSPLL in two

2024-02-06T14:07:18+00:00

The MSSPLL is really two stages - there's the PLL itself and 4 outputs,
each with their own divider. The current driver models this as a single
entity, outputting a single clock, used for both the CPU and AHB/AXI
buses. The other 3 outputs are used for the eMMC, "user crypto" and CAN
controller. Split the MSSPLL in two, as a precursor to adding support
for the other 3 outputs, with the PLL itself as one "hw" clock and the
output divider stage as another.

Signed-off-by: Conor Dooley

clk: microchip: mpfs-ccc: replace include of asm-generic/errno-base.h

2023-12-17T22:47:43+00:00

As evidenced by the fact that only 2 other drivers include this header,
it is not a normal thing to do. Including the regular version of this
header is far more conventional for drivers.

Acked-by: Al Viro 
Signed-off-by: Conor Dooley 
Link: https://lore.kernel.org/r/20231214-dipper-earshot-72eef3059961@spud
Signed-off-by: Stephen Boyd

clk: Explicitly include correct DT includes

2023-07-19T20:13:16+00:00

The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Acked-by: Dinh Nguyen 
Acked-by: Krzysztof Kozlowski  # samsung
Acked-by: Heiko Stuebner  #rockchip
Acked-by: Chanwoo Choi 
Acked-by: Geert Uytterhoeven 
Reviewed-by: AngeloGioacchino Del Regno 
Reviewed-by: Luca Ceresoli  # versaclock5
Signed-off-by: Rob Herring 
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa  #imx
Signed-off-by: Stephen Boyd

clk: microchip: Use of_property_read_bool() for boolean properties

2023-05-22T08:57:31+00:00

It is preferred to use typed property access functions (i.e.
of_property_read_ functions) rather than low-level
of_get_property/of_find_property functions for reading properties.
Convert reading boolean properties to to of_property_read_bool().

Signed-off-by: Rob Herring 
Signed-off-by: Claudiu Beznea 
Link: https://lore.kernel.org/r/20230310144701.1541573-1-robh@kernel.org

clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

2023-05-22T08:57:27+00:00

As part of converting RISC-V SOC_FOO symbols to ARCH_FOO to match the
use of such symbols on other architectures, convert the Microchip FPGA
clock drivers to use the new symbol.

Signed-off-by: Conor Dooley 
Signed-off-by: Claudiu Beznea 
Link: https://lore.kernel.org/r/20230309204452.969574-2-conor@kernel.org