<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clocksource/Makefile, branch v6.6.132</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>clocksource/drivers/timer-oxnas-rps: Remove obsolete timer driver</title>
<updated>2023-07-13T12:46:17+00:00</updated>
<author>
<name>Neil Armstrong</name>
<email>neil.armstrong@linaro.org</email>
</author>
<published>2023-06-30T16:58:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=56f99cdc5b11a65a19410171b6a84c612778f0c9'/>
<id>56f99cdc5b11a65a19410171b6a84c612778f0c9</id>
<content type='text'>
Due to lack of maintenance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 timer.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Acked-by: Andy Shevchenko &lt;andy@kernel.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230630-topic-oxnas-upstream-remove-v2-3-fb6ab3dea87c@linaro.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Due to lack of maintenance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 timer.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Daniel Golle &lt;daniel@makrotopia.org&gt;
Signed-off-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Acked-by: Andy Shevchenko &lt;andy@kernel.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230630-topic-oxnas-upstream-remove-v2-3-fb6ab3dea87c@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/loongson1: Move PWM timer to clocksource framework</title>
<updated>2023-06-19T15:07:03+00:00</updated>
<author>
<name>Keguang Zhang</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2023-05-12T10:37:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=e738521a11f13e40af89f66527e59306c4169782'/>
<id>e738521a11f13e40af89f66527e59306c4169782</id>
<content type='text'>
This patch moves most part of arch/mips/loongson32/common/time.c
into drivers/clocksource.

Adapt the driver to clocksource framework with devicetree support
and updates Kconfig/Makefile options.

Signed-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230512103724.587760-4-keguang.zhang@gmail.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch moves most part of arch/mips/loongson32/common/time.c
into drivers/clocksource.

Adapt the driver to clocksource framework with devicetree support
and updates Kconfig/Makefile options.

Signed-off-by: Keguang Zhang &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230512103724.587760-4-keguang.zhang@gmail.com
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-mediatek: Split out CPUXGPT timers</title>
<updated>2023-04-24T14:56:13+00:00</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2023-03-09T10:39:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=49d576ea72a4fa5be15717babfa308b70b2bc5a4'/>
<id>49d576ea72a4fa5be15717babfa308b70b2bc5a4</id>
<content type='text'>
On MediaTek platforms, CPUXGPT is the source for the AArch64 System
Timer, read through CNTVCT_EL0.

The handling for starting this timer ASAP was introduced in commit
327e93cf9a59 ("clocksource/drivers/timer-mediatek: Implement CPUXGPT timers")
which description also contains an important full explanation of the
reasons why this driver is necessary and cannot be a module.

In preparation for an eventual conversion of timer-mediatek to a
platform_driver that would be possibly built as a module, split out
the CPUXGPT timers driver to a new timer-mediatek-cpux.c driver.

This commit brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Walter Chang &lt;walter.chang@mediatek.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230309103913.116775-1-angelogioacchino.delregno@collabora.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On MediaTek platforms, CPUXGPT is the source for the AArch64 System
Timer, read through CNTVCT_EL0.

The handling for starting this timer ASAP was introduced in commit
327e93cf9a59 ("clocksource/drivers/timer-mediatek: Implement CPUXGPT timers")
which description also contains an important full explanation of the
reasons why this driver is necessary and cannot be a module.

In preparation for an eventual conversion of timer-mediatek to a
platform_driver that would be possibly built as a module, split out
the CPUXGPT timers driver to a new timer-mediatek-cpux.c driver.

This commit brings no functional changes.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Walter Chang &lt;walter.chang@mediatek.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20230309103913.116775-1-angelogioacchino.delregno@collabora.com
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'timers-v5.20-rc1' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core</title>
<updated>2022-07-28T10:33:34+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2022-07-28T10:33:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=75fed76ebc8f75e7a9f8c9ca39482aa34932ad41'/>
<id>75fed76ebc8f75e7a9f8c9ca39482aa34932ad41</id>
<content type='text'>
Pull clockevent/source updates from Daniel Lezcano:

  - Add the missing DT bindings for the MTU nomadik timer (Linus
    Walleij)

  - Fix grammar typo in the ARM global timer Kconfig option (Randy
    Dunlap)

  - Add the tegra186 timer and use it on the tegra234 board (Thierry
    Reding)

  - Add the 'CPUXGPT' CPU timer for Mediatek MT6795 and implement a
    workaround to overcome an ATF bug where the timer is not correctly
    initialized (AngeloGioacchino Del Regno)

  - Rework the suspend/resume approach to enable the feature on the
    timer even it is not an active clock and fix a compilation warning
    (Claudiu Beznea)

  - Add the Add R-Car Gen4 timer support along with the DT bindings
    (Wolfram Sang)

  - Add compatible for ti,am654-timer to support AM6 SoC (Tony Lindgren)

  - Fix Kconfig option to put it back to 'bool' instead of 'tristate'
    for the tegra186 (Daniel Lezcano)

  - Sort 'family,type' DT bindings for the Renesas timers (Geert
    Uytterhoeven)

  - Add compatible 'allwinner,sun20i-d1-timer' for Allwinner D1 (Samuel
    Holland)

  - Remove unnecessary (void*) conversions for sun4i (XU pengfei)

  - Remove unnecessary (void*) conversions for sun5i (Li zeming)

Link: https://lore.kernel.org/all/7472984e-f502-5f27-82bf-070127dd85a5@linaro.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull clockevent/source updates from Daniel Lezcano:

  - Add the missing DT bindings for the MTU nomadik timer (Linus
    Walleij)

  - Fix grammar typo in the ARM global timer Kconfig option (Randy
    Dunlap)

  - Add the tegra186 timer and use it on the tegra234 board (Thierry
    Reding)

  - Add the 'CPUXGPT' CPU timer for Mediatek MT6795 and implement a
    workaround to overcome an ATF bug where the timer is not correctly
    initialized (AngeloGioacchino Del Regno)

  - Rework the suspend/resume approach to enable the feature on the
    timer even it is not an active clock and fix a compilation warning
    (Claudiu Beznea)

  - Add the Add R-Car Gen4 timer support along with the DT bindings
    (Wolfram Sang)

  - Add compatible for ti,am654-timer to support AM6 SoC (Tony Lindgren)

  - Fix Kconfig option to put it back to 'bool' instead of 'tristate'
    for the tegra186 (Daniel Lezcano)

  - Sort 'family,type' DT bindings for the Renesas timers (Geert
    Uytterhoeven)

  - Add compatible 'allwinner,sun20i-d1-timer' for Allwinner D1 (Samuel
    Holland)

  - Remove unnecessary (void*) conversions for sun4i (XU pengfei)

  - Remove unnecessary (void*) conversions for sun5i (Li zeming)

Link: https://lore.kernel.org/all/7472984e-f502-5f27-82bf-070127dd85a5@linaro.org
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-ti-dm: Make timer selectable for ARCH_K3</title>
<updated>2022-07-27T15:00:48+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2022-04-08T10:17:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=ab0bbef3ae0f6b5a3b60671cd0124d0fc4fc2567'/>
<id>ab0bbef3ae0f6b5a3b60671cd0124d0fc4fc2567</id>
<content type='text'>
Let's make timer-ti-dm selectable for ARCH_K3, and add a separate option
for OMAP_DM_SYSTIMER as there should be no need for it on ARCH_K3.

For older TI SoCs, we are already selecting OMAP_DM_TIMER in
arch/arm/mach-omap*/Kconfig. For mach-omap2, we need to now also select
OMAP_DM_SYSTIMER.

Cc: Keerthy &lt;j-keerthy@ti.com&gt;
Cc: Nishanth Menon &lt;nm@ti.com&gt;
Cc: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20220408101715.43697-3-tony@atomide.com
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Let's make timer-ti-dm selectable for ARCH_K3, and add a separate option
for OMAP_DM_SYSTIMER as there should be no need for it on ARCH_K3.

For older TI SoCs, we are already selecting OMAP_DM_TIMER in
arch/arm/mach-omap*/Kconfig. For mach-omap2, we need to now also select
OMAP_DM_SYSTIMER.

Cc: Keerthy &lt;j-keerthy@ti.com&gt;
Cc: Nishanth Menon &lt;nm@ti.com&gt;
Cc: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Link: https://lore.kernel.org/r/20220408101715.43697-3-tony@atomide.com
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource: Add Tegra186 timers support</title>
<updated>2022-07-15T22:38:50+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2022-07-04T08:13:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=42cee19a9f839f2d60f1cd237d6905d8649127aa'/>
<id>42cee19a9f839f2d60f1cd237d6905d8649127aa</id>
<content type='text'>
Currently this only supports a single watchdog, which uses a timer in
the background for countdown. Eventually the timers could be used for
various time-keeping tasks, but by default the architected timer will
already provide that functionality.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Kartik &lt;kkartik@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/1656922422-25823-3-git-send-email-kkartik@nvidia.com
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently this only supports a single watchdog, which uses a timer in
the background for countdown. Eventually the timers could be used for
various time-keeping tasks, but by default the architected timer will
already provide that functionality.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Kartik &lt;kkartik@nvidia.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/1656922422-25823-3-git-send-email-kkartik@nvidia.com
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'hpe/gxp-soc' into arm/late</title>
<updated>2022-05-27T13:55:37+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2022-05-27T13:52:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3e11194631275937bc40da49b98aa1a74dd1ee67'/>
<id>3e11194631275937bc40da49b98aa1a74dd1ee67</id>
<content type='text'>
Patch series from Nick Hawkins:

"The GXP is the HPE BMC SoC that is used in the majority of HPE current
 generation servers. Traditionally the asic will last multiple
 generations of server before being replaced.

 Info about SoC:

  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
  A9 core. It is capable of using an AXI bus to which a memory controller
  is attached. It has multiple SPI interfaces to connect boot flash and
  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has
  multiple i2c engines to drive connectivity with a host infrastructure.
  The initial patches enable the watchdog and timer enabling the host to
  be able to boot."

* hpe/gxp-soc:
  MAINTAINERS: Introduce HPE GXP Architecture
  ARM: dts: Introduce HPE GXP Device tree
  dt-bindings: arm: hpe: add GXP Support
  dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog
  clocksource/drivers/timer-gxp: Add HPE GXP Timer
  watchdog: hpe-wdt: Introduce HPE GXP Watchdog
  ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH
  ARM: hpe: Introduce the HPE GXP architecture

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Patch series from Nick Hawkins:

"The GXP is the HPE BMC SoC that is used in the majority of HPE current
 generation servers. Traditionally the asic will last multiple
 generations of server before being replaced.

 Info about SoC:

  HPE GXP is the name of the HPE Soc. This SoC is used to implement many
  BMC features at HPE. It supports ARMv7 architecture based on the Cortex
  A9 core. It is capable of using an AXI bus to which a memory controller
  is attached. It has multiple SPI interfaces to connect boot flash and
  BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It has
  multiple i2c engines to drive connectivity with a host infrastructure.
  The initial patches enable the watchdog and timer enabling the host to
  be able to boot."

* hpe/gxp-soc:
  MAINTAINERS: Introduce HPE GXP Architecture
  ARM: dts: Introduce HPE GXP Device tree
  dt-bindings: arm: hpe: add GXP Support
  dt-bindings: timer: hpe,gxp-timer: Add HPE GXP Timer and Watchdog
  clocksource/drivers/timer-gxp: Add HPE GXP Timer
  watchdog: hpe-wdt: Introduce HPE GXP Watchdog
  ARM: configs: multi_v7_defconfig: Add HPE GXP ARCH
  ARM: hpe: Introduce the HPE GXP architecture

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic</title>
<updated>2022-05-26T17:50:30+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-05-26T17:50:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=16477cdfefdb494235a675cc80563d736991d833'/>
<id>16477cdfefdb494235a675cc80563d736991d833</id>
<content type='text'>
Pull asm-generic updates from Arnd Bergmann:
 "The asm-generic tree contains three separate changes for linux-5.19:

   - The h8300 architecture is retired after it has been effectively
     unmaintained for a number of years. This is the last architecture
     we supported that has no MMU implementation, but there are still a
     few architectures (arm, m68k, riscv, sh and xtensa) that support
     CPUs with and without an MMU.

   - A series to add a generic ticket spinlock that can be shared by
     most architectures with a working cmpxchg or ll/sc type atomic,
     including the conversion of riscv, csky and openrisc. This series
     is also a prerequisite for the loongarch64 architecture port that
     will come as a separate pull request.

   - A cleanup of some exported uapi header files to ensure they can be
     included from user space without relying on other kernel headers"

* tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  h8300: remove stale bindings and symlink
  sparc: add asm/stat.h to UAPI compile-test coverage
  powerpc: add asm/stat.h to UAPI compile-test coverage
  mips: add asm/stat.h to UAPI compile-test coverage
  riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage
  kbuild: prevent exported headers from including &lt;stdlib.h&gt;, &lt;stdbool.h&gt;
  agpgart.h: do not include &lt;stdlib.h&gt; from exported header
  csky: Move to generic ticket-spinlock
  RISC-V: Move to queued RW locks
  RISC-V: Move to generic spinlocks
  openrisc: Move to ticket-spinlock
  asm-generic: qrwlock: Document the spinlock fairness requirements
  asm-generic: qspinlock: Indicate the use of mixed-size atomics
  asm-generic: ticket-lock: New generic ticket-based spinlock
  remove the h8300 architecture
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull asm-generic updates from Arnd Bergmann:
 "The asm-generic tree contains three separate changes for linux-5.19:

   - The h8300 architecture is retired after it has been effectively
     unmaintained for a number of years. This is the last architecture
     we supported that has no MMU implementation, but there are still a
     few architectures (arm, m68k, riscv, sh and xtensa) that support
     CPUs with and without an MMU.

   - A series to add a generic ticket spinlock that can be shared by
     most architectures with a working cmpxchg or ll/sc type atomic,
     including the conversion of riscv, csky and openrisc. This series
     is also a prerequisite for the loongarch64 architecture port that
     will come as a separate pull request.

   - A cleanup of some exported uapi header files to ensure they can be
     included from user space without relying on other kernel headers"

* tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
  h8300: remove stale bindings and symlink
  sparc: add asm/stat.h to UAPI compile-test coverage
  powerpc: add asm/stat.h to UAPI compile-test coverage
  mips: add asm/stat.h to UAPI compile-test coverage
  riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage
  kbuild: prevent exported headers from including &lt;stdlib.h&gt;, &lt;stdbool.h&gt;
  agpgart.h: do not include &lt;stdlib.h&gt; from exported header
  csky: Move to generic ticket-spinlock
  RISC-V: Move to queued RW locks
  RISC-V: Move to generic spinlocks
  openrisc: Move to ticket-spinlock
  asm-generic: qrwlock: Document the spinlock fairness requirements
  asm-generic: qspinlock: Indicate the use of mixed-size atomics
  asm-generic: ticket-lock: New generic ticket-based spinlock
  remove the h8300 architecture
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers/timer-gxp: Add HPE GXP Timer</title>
<updated>2022-05-18T12:05:54+00:00</updated>
<author>
<name>Nick Hawkins</name>
<email>nick.hawkins@hpe.com</email>
</author>
<published>2022-05-16T16:33:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=5184f4bf151bb4f4ab2f0f10a66b96acdf35da1a'/>
<id>5184f4bf151bb4f4ab2f0f10a66b96acdf35da1a</id>
<content type='text'>
Add support for the HPE GXP SOC timer. The GXP supports several different
kinds of timers but for the purpose of this driver there is only support
for the General Timer. The timer has a 1us resolution and is 32 bits. The
timer also creates a child watchdog device as the register region is the
same.

Signed-off-by: Nick Hawkins &lt;nick.hawkins@hpe.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for the HPE GXP SOC timer. The GXP supports several different
kinds of timers but for the purpose of this driver there is only support
for the General Timer. The timer has a 1us resolution and is 32 bits. The
timer also creates a child watchdog device as the register region is the
same.

Signed-off-by: Nick Hawkins &lt;nick.hawkins@hpe.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clocksource/drivers: Add a goldfish-timer clocksource</title>
<updated>2022-04-11T09:48:01+00:00</updated>
<author>
<name>Laurent Vivier</name>
<email>laurent@vivier.eu</email>
</author>
<published>2022-04-06T20:15:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=c92e7ef16400bf035e8b49c7dd091bfce4f99773'/>
<id>c92e7ef16400bf035e8b49c7dd091bfce4f99773</id>
<content type='text'>
Add a clocksource based on the goldfish-rtc device.

Move the timer register definition to &lt;clocksource/timer-goldfish.h&gt;

This kernel implementation is based on the QEMU upstream implementation:

   https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c

goldfish-timer is a high-precision signed 64-bit nanosecond timer.
It is part of the 'goldfish' virtual hardware platform used to run
some emulated Android systems under QEMU.
This timer only supports oneshot event.

Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20220406201523.243733-4-laurent@vivier.eu
Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a clocksource based on the goldfish-rtc device.

Move the timer register definition to &lt;clocksource/timer-goldfish.h&gt;

This kernel implementation is based on the QEMU upstream implementation:

   https://git.qemu.org/?p=qemu.git;a=blob_plain;f=hw/rtc/goldfish_rtc.c

goldfish-timer is a high-precision signed 64-bit nanosecond timer.
It is part of the 'goldfish' virtual hardware platform used to run
some emulated Android systems under QEMU.
This timer only supports oneshot event.

Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Link: https://lore.kernel.org/r/20220406201523.243733-4-laurent@vivier.eu
Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
