linux.git/drivers/clocksource, branch v3.14.41

clocksource: efm32: Fix a NULL pointer dereference

2015-04-13T12:02:59+00:00

commit 7b8f10da3bf1056546133c9f54f49ce389fd95ab upstream.

The initialisation of the efm32 clocksource first sets up the irq and only
after that initialises the data needed for irq handling. In case this
initialisation is delayed the irq handler would dereference a NULL pointer.

I'm not aware of anything that could delay the process in such a way, but it's
better to be safe than sorry, so setup the irq only when the clock event device
is ready.

Acked-by: Uwe Kleine-König 
Signed-off-by: Yongbae Park 
Signed-off-by: Daniel Lezcano 
Signed-off-by: Greg Kroah-Hartman

clockevents: sun5i: Fix setup_irq init sequence

2015-04-13T12:02:59+00:00

commit 1096be084ac59927158ce80ff1d31c33eed0e565 upstream.

The interrupt is enabled before the handler is set. Even this bug
did not appear, it is potentially dangerous as it can lead to a
NULL pointer dereference.

Fix the error by enabling the interrupt after
clockevents_config_and_register() is called.

Signed-off-by: Yongbae Park 
Signed-off-by: Daniel Lezcano 
Signed-off-by: Greg Kroah-Hartman

clocksource: exynos_mct: Fix bitmask regression for exynos4_mct_write

2015-01-30T01:40:49+00:00

commit 8c38d28ba8da98f7102c31d35359b4dbe9d1f329 upstream.

EXYNOS4_MCT_L_MASK is defined as 0xffffff00, so applying this bitmask
produces a number outside the range 0x00 to 0xff, which always results
in execution of the default switch statement.

Obviously this is wrong and git history shows that the bitmask inversion
was incorrectly set during a refactoring of the MCT code.

Fix this by putting the inversion at the correct position again.

Acked-by: Kukjin Kim 
Reported-by: GP Orcullo 
Reviewed-by: Doug Anderson 
Signed-off-by: Tobias Jakobi 
Signed-off-by: Daniel Lezcano 
Signed-off-by: Greg Kroah-Hartman

clockevent: sun4i: Fix race condition in the probe code

2014-12-06T23:55:34+00:00

commit 6bab4a8a1888729f17f4923cc5867e4674f66333 upstream.

The interrupts were activated and the handler registered before the clockevent
was registered in the probe function.

The interrupt handler, however, was making the assumption that the clockevent
device was registered.

That could cause a null pointer dereference if the timer interrupt was firing
during this narrow window.

Fix that by moving the clockevent registration before the interrupt is enabled.

Reported-by: Roman Byshko 
Signed-off-by: Maxime Ripard 
Signed-off-by: Daniel Lezcano 
Signed-off-by: Greg Kroah-Hartman

clocksource: Exynos_mct: Register clock event after request_irq()

2014-06-07T17:28:08+00:00

commit 8db6e5104b77de5d0b7002b95069da0992a34be9 upstream.

After hotplugging CPU1 the first call of interrupt handler for CPU1
oneshot timer was called on CPU0 because it fired before setting IRQ
affinity. Affected are SoCs where Multi Core Timer interrupts are
shared (SPI), e.g. Exynos 4210.

During setup of the MCT timers the clock event device should be
registered after setting the affinity for interrupt. This will prevent
starting the timer too early.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Thomas Gleixner 
Cc: Kyungmin Park 
Cc: Marek Szyprowski 
Cc: Bartlomiej Zolnierkiewicz 
Cc: Tomasz Figa ,
Cc: Daniel Lezcano ,
Cc: Kukjin Kim 
Cc: linux-arm-kernel@lists.infradead.org,
Link: http://lkml.kernel.org/r/20140416143316.299247848@linutronix.de
Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

clocksource: Exynos_mct: Use irq_force_affinity() in cpu bringup

2014-06-07T17:28:08+00:00

commit 30ccf03b4a6a2102a2219058bdc6d779dc637dd7 upstream.

The starting cpu is not yet in the online mask so irq_set_affinity()
fails which results in per cpu timers for this cpu ending up on some
other online cpu, ususally cpu 0.

Use irq_force_affinity() which disables the online mask check and
makes things work.

Signed-off-by: Thomas Gleixner 
Tested-by: Krzysztof Kozlowski 
Cc: Kyungmin Park 
Cc: Marek Szyprowski 
Cc: Bartlomiej Zolnierkiewicz 
Cc: Tomasz Figa ,
Cc: Daniel Lezcano ,
Cc: Kukjin Kim 
Cc: linux-arm-kernel@lists.infradead.org,
Link: http://lkml.kernel.org/r/20140416143316.106665251@linutronix.de
Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

clocksource: vf_pit_timer: use complement for sched_clock reading

2014-03-06T10:34:14+00:00

Vybrids PIT register is monitonic decreasing. However, sched_clock
reading needs to be monitonic increasing. Use bitwise not to get
the complement of the clock register. This fixes the clock going
backward. Also, the clock now starts at 0 since we load the
register with the maximum value at start.

Signed-off-by: Stefan Agner 
Acked-by: Shawn Guo 
Cc: daniel.lezcano@linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Link: http://lkml.kernel.org/r/d25af915993aec1b486be653eb86f748ddef54fe.1394057313.git.stefan@agner.ch
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner

clocksource: Kona: Print warning rather than panic

2014-02-06T15:01:40+00:00

Since there may be other clocksources available, this driver should not
trigger a panic simply because it can not determine the frequency of an
external clock.  This change refactors the driver to allow a warning to
be printed in this case instead.

Signed-off-by: Tim Kryger 
Reviewed-by: Markus Mayer 
Reviewed-by: Matt Porter 
Cc: Christian Daudt 
Cc: Daniel Lezcano 
Link: http://lkml.kernel.org/r/1391559304-26558-1-git-send-email-tim.kryger@linaro.org
Signed-off-by: Thomas Gleixner

clocksource: kona: Add basic use of external clock

2014-02-01T05:04:01+00:00

When an clock is specified in the device tree, enable it and use it to
determine the external clock frequency.

Signed-off-by: Tim Kryger 
Reviewed-by: Markus Mayer 
Reviewed-by: Matt Porter 
Reviewed-by: Christian Daudt 
Acked-by: Daniel Lezcano 
Signed-off-by: Christian Daudt 
Signed-off-by: Olof Johansson

Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2014-01-24T02:45:38+00:00

Pull ARM SoC DT updates from Olof Johansson:
 "DT and DT-conversion-related changes for various ARM platforms.  Most
  of these are to enable various devices on various boards, etc, and not
  necessarily worth enumerating.

  New boards and systems continue to come in as new devicetree files
  that don't require corresponding C changes any more, which is
  indicating that the system is starting to work fairly well.

  A few things worth pointing out:

   * ST Ericsson ux500 platforms have made the major push to move over
     to fully support the platform with DT
   * Renesas platforms continue their conversion over from legacy
     platform devices to DT-based for hardware description"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (327 commits)
  ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
  ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
  ARM: dts: sirf: add lost minigpsrtc device node
  ARM: dts: sirf: add clock, frequence-voltage table for CPU0
  ARM: dts: sirf: add lost bus_width, clock and status for sdhci
  ARM: dts: sirf: add lost clocks for cphifbg
  ARM: dts: socfpga: add pl330 clock
  ARM: dts: socfpga: update L2 tag and data latency
  arm: sun7i: cubietruck: Enable the i2c controllers
  ARM: dts: add support for EXYNOS4412 based TINY4412 board
  ARM: dts: Add initial support for Arndale Octa board
  ARM: bcm2835: add USB controller to device tree
  ARM: dts: MSM8974: Add MMIO architected timer node
  ARM: dts: MSM8974: Add restart node
  ARM: dts: sun7i: external clock outputs
  ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style
  ARM: dts: sun7i: Add pin muxing options for clock outputs
  ARM: dts: sun7i: Add rtp controller node
  ARM: dts: sun5i: Add rtp controller node
  ARM: dts: sun4i: Add rtp controller node
  ...