<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/fpga/dfl.c, branch v5.10.258</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>fpga: dfl: use subsys_initcall to allow built-in drivers to be added</title>
<updated>2026-03-04T12:20:13+00:00</updated>
<author>
<name>Thadeu Lima de Souza Cascardo</name>
<email>cascardo@igalia.com</email>
</author>
<published>2025-12-15T19:05:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=64f894830c325a00e95b42ec575471f7040f6248'/>
<id>64f894830c325a00e95b42ec575471f7040f6248</id>
<content type='text'>
[ Upstream commit 267f53140c9d0bf270bbe0148082e9b8e5011273 ]

The dfl code adds a bus. If it is built-in and there is a built-in driver
as well, the dfl module_init may be called after the driver module_init,
leading to a failure to register the driver as the bus has not been added
yet.

Use subsys_initcall, which guarantees it will be called before the drivers
init code.

Without the fix, we see failures like this:

[    0.479475] Driver 'intel-m10-bmc' was unable to register with bus_type 'dfl' because the bus was not initialized.

Cc: stable@vger.kernel.org
Fixes: 9ba3a0aa09fe ("fpga: dfl: create a dfl bus type to support DFL devices")
Signed-off-by: Thadeu Lima de Souza Cascardo &lt;cascardo@igalia.com&gt;
Link: https://lore.kernel.org/r/20251215-dfl_subsys-v1-1-21807bad6b10@igalia.com
Reviewed-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@linux.intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 267f53140c9d0bf270bbe0148082e9b8e5011273 ]

The dfl code adds a bus. If it is built-in and there is a built-in driver
as well, the dfl module_init may be called after the driver module_init,
leading to a failure to register the driver as the bus has not been added
yet.

Use subsys_initcall, which guarantees it will be called before the drivers
init code.

Without the fix, we see failures like this:

[    0.479475] Driver 'intel-m10-bmc' was unable to register with bus_type 'dfl' because the bus was not initialized.

Cc: stable@vger.kernel.org
Fixes: 9ba3a0aa09fe ("fpga: dfl: create a dfl bus type to support DFL devices")
Signed-off-by: Thadeu Lima de Souza Cascardo &lt;cascardo@igalia.com&gt;
Link: https://lore.kernel.org/r/20251215-dfl_subsys-v1-1-21807bad6b10@igalia.com
Reviewed-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@linux.intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: region: Use standard dev_release for class driver</title>
<updated>2024-06-16T11:32:19+00:00</updated>
<author>
<name>Russ Weight</name>
<email>russell.h.weight@intel.com</email>
</author>
<published>2021-11-19T01:55:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=af02dec83a48cd8b32266bb4bea7a557be974d35'/>
<id>af02dec83a48cd8b32266bb4bea7a557be974d35</id>
<content type='text'>
[ Upstream commit 8886a579744fbfa53e69aa453ed10ae3b1f9abac ]

The FPGA region class driver data structure is being treated as a
managed resource instead of using the standard dev_release call-back
function to release the class data structure. This change removes the
managed resource code and combines the create() and register()
functions into a single register() or register_full() function.

The register_full() function accepts an info data structure to provide
flexibility in passing optional parameters. The register() function
supports the current parameter list for users that don't require the
use of optional parameters.

Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Acked-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Stable-dep-of: b7c0e1ecee40 ("fpga: region: add owner module and take its refcount")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 8886a579744fbfa53e69aa453ed10ae3b1f9abac ]

The FPGA region class driver data structure is being treated as a
managed resource instead of using the standard dev_release call-back
function to release the class data structure. This change removes the
managed resource code and combines the create() and register()
functions into a single register() or register_full() function.

The register_full() function accepts an info data structure to provide
flexibility in passing optional parameters. The register() function
supports the current parameter list for users that don't require the
use of optional parameters.

Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Acked-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Stable-dep-of: b7c0e1ecee40 ("fpga: region: add owner module and take its refcount")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: prevent integer overflow in dfl_feature_ioctl_set_irq()</title>
<updated>2022-10-26T11:25:33+00:00</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@oracle.com</email>
</author>
<published>2022-09-01T05:18:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=f59861946fa51bcc1f305809e4ebc1013b0ee61c'/>
<id>f59861946fa51bcc1f305809e4ebc1013b0ee61c</id>
<content type='text'>
[ Upstream commit 939bc5453b8cbdde9f1e5110ce8309aedb1b501a ]

The "hdr.count * sizeof(s32)" multiplication can overflow on 32 bit
systems leading to memory corruption.  Use array_size() to fix that.

Fixes: 322b598be4d9 ("fpga: dfl: introduce interrupt trigger setting API")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Acked-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Link: https://lore.kernel.org/r/YxBAtYCM38dM7yzI@kili
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 939bc5453b8cbdde9f1e5110ce8309aedb1b501a ]

The "hdr.count * sizeof(s32)" multiplication can overflow on 32 bit
systems leading to memory corruption.  Use array_size() to fix that.

Fixes: 322b598be4d9 ("fpga: dfl: introduce interrupt trigger setting API")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Acked-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Link: https://lore.kernel.org/r/YxBAtYCM38dM7yzI@kili
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: create a dfl bus type to support DFL devices</title>
<updated>2020-09-10T03:28:16+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2020-09-07T14:23:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9ba3a0aa09fe505540a3bdd11f0da3b8e9d73055'/>
<id>9ba3a0aa09fe505540a3bdd11f0da3b8e9d73055</id>
<content type='text'>
A new bus type "dfl" is introduced for private features which are not
initialized by DFL feature drivers (dfl-fme &amp; dfl-afu drivers). So these
private features could be handled by separate driver modules.

DFL feature drivers (dfl-fme, dfl-port) will create DFL devices on
enumeration. DFL drivers could be registered on this bus to match these
DFL devices. They are matched by dfl type &amp; feature_id.

[mdf@kernel.org: Add missing Documentation part to MAINTAINERS file]

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A new bus type "dfl" is introduced for private features which are not
initialized by DFL feature drivers (dfl-fme &amp; dfl-afu drivers). So these
private features could be handled by separate driver modules.

DFL feature drivers (dfl-fme, dfl-port) will create DFL devices on
enumeration. DFL drivers could be registered on this bus to match these
DFL devices. They are matched by dfl type &amp; feature_id.

[mdf@kernel.org: Add missing Documentation part to MAINTAINERS file]

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: map feature mmio resources in their own feature drivers</title>
<updated>2020-08-31T00:15:58+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2020-08-19T07:45:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=89eb35e810a87d69c878d66e89c7f19f34539036'/>
<id>89eb35e810a87d69c878d66e89c7f19f34539036</id>
<content type='text'>
This patch makes preparation for modularization of DFL sub feature
drivers.

DFL based FPGA devices may contain some IP blocks which are already
supported by kernel, most of them are supported by platform device
drivers. We could create platform devices for these IP blocks and get them
supported by these drivers.

An important issue is that platform device drivers usually requests mmio
resources on probe. But now DFL mmio is mapped in DFL bus driver (e.g.
dfl-pci) as a whole region. Then platform device drivers for sub features
can't request their own mmio resources again. This is what the patch
trying to resolve.

This patch changes the DFL enumeration. DFL bus driver will unmap mmio
resources after first step enumeration and pass enumeration info to DFL
framework. Then DFL framework will map the mmio resources again, do 2nd
step enumeration, and also unmap the mmio resources. In this way, sub
feature drivers could then request their own mmio resources as needed.

An exception is that mmio resource of FIU headers are still mapped in DFL
bus driver. The FIU headers have some fundamental functions (sriov set,
port enable/disable) needed for DFL bus devices and other sub features.
They should not be unmapped as long as DFL bus device is alive.

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch makes preparation for modularization of DFL sub feature
drivers.

DFL based FPGA devices may contain some IP blocks which are already
supported by kernel, most of them are supported by platform device
drivers. We could create platform devices for these IP blocks and get them
supported by these drivers.

An important issue is that platform device drivers usually requests mmio
resources on probe. But now DFL mmio is mapped in DFL bus driver (e.g.
dfl-pci) as a whole region. Then platform device drivers for sub features
can't request their own mmio resources again. This is what the patch
trying to resolve.

This patch changes the DFL enumeration. DFL bus driver will unmap mmio
resources after first step enumeration and pass enumeration info to DFL
framework. Then DFL framework will map the mmio resources again, do 2nd
step enumeration, and also unmap the mmio resources. In this way, sub
feature drivers could then request their own mmio resources as needed.

An exception is that mmio resource of FIU headers are still mapped in DFL
bus driver. The FIU headers have some fundamental functions (sriov set,
port enable/disable) needed for DFL bus devices and other sub features.
They should not be unmapped as long as DFL bus device is alive.

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;
Signed-off-by: Russ Weight &lt;russell.h.weight@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: change data type of feature id to u16</title>
<updated>2020-08-20T04:05:47+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2020-08-10T02:41:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8a5de2de0339cdb7bd269140f857b62ba7222759'/>
<id>8a5de2de0339cdb7bd269140f857b62ba7222759</id>
<content type='text'>
The feature id is stored in a 12 bit field in DFH. So a u16 variable is
enough for feature id.

This patch changes all feature id related places to fit u16.

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The feature id is stored in a 12 bit field in DFH. So a u16 variable is
enough for feature id.

This patch changes all feature id related places to fit u16.

Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Reviewed-by: Tom Rix &lt;trix@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: introduce interrupt trigger setting API</title>
<updated>2020-06-28T19:43:16+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2020-06-16T04:08:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=322b598be4d9b9090cda560c4caab78704615ab4'/>
<id>322b598be4d9b9090cda560c4caab78704615ab4</id>
<content type='text'>
FPGA user applications may be interested in interrupts generated by
DFL features. For example, users can implement their own FPGA
logics with interrupts enabled in AFU (Accelerated Function Unit,
dynamic region of DFL based FPGA). So user applications need to be
notified to handle these interrupts.

In order to allow userspace applications to monitor interrupts,
driver requires userspace to provide eventfds as interrupt
notification channels. Applications then poll/select on the eventfds
to get notified.

This patch introduces a generic helper functions to do eventfds binding
with given interrupts.

Sub feature drivers are expected to use XXX_GET_IRQ_NUM to query irq
info, and XXX_SET_IRQ to set eventfds for interrupts. This patch also
introduces helper functions for these 2 ioctls.

Signed-off-by: Luwei Kang &lt;luwei.kang@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Tom Rix &lt;trix@redhat.com&gt;
Reviewed-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
FPGA user applications may be interested in interrupts generated by
DFL features. For example, users can implement their own FPGA
logics with interrupts enabled in AFU (Accelerated Function Unit,
dynamic region of DFL based FPGA). So user applications need to be
notified to handle these interrupts.

In order to allow userspace applications to monitor interrupts,
driver requires userspace to provide eventfds as interrupt
notification channels. Applications then poll/select on the eventfds
to get notified.

This patch introduces a generic helper functions to do eventfds binding
with given interrupts.

Sub feature drivers are expected to use XXX_GET_IRQ_NUM to query irq
info, and XXX_SET_IRQ to set eventfds for interrupts. This patch also
introduces helper functions for these 2 ioctls.

Signed-off-by: Luwei Kang &lt;luwei.kang@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Tom Rix &lt;trix@redhat.com&gt;
Reviewed-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: parse interrupt info for feature devices on enumeration</title>
<updated>2020-06-28T19:42:29+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2020-06-16T04:08:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8d021039cbb5e358c7c07c562811253a61c8d551'/>
<id>8d021039cbb5e358c7c07c562811253a61c8d551</id>
<content type='text'>
DFL based FPGA devices could support interrupts for different purposes,
but current DFL framework only supports feature device enumeration with
given MMIO resources information via common DFL headers. This patch
introduces one new API dfl_fpga_enum_info_add_irq for low level bus
drivers (e.g. PCIe device driver) to pass its interrupt resources
information to DFL framework for enumeration, and also adds interrupt
enumeration code in framework to parse and assign interrupt resources
for enumerated feature devices and their own sub features.

With this patch, DFL framework enumerates interrupt resources for core
features, including PORT Error Reporting, FME (FPGA Management Engine)
Error Reporting and also AFU User Interrupts.

Signed-off-by: Luwei Kang &lt;luwei.kang@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Reviewed-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DFL based FPGA devices could support interrupts for different purposes,
but current DFL framework only supports feature device enumeration with
given MMIO resources information via common DFL headers. This patch
introduces one new API dfl_fpga_enum_info_add_irq for low level bus
drivers (e.g. PCIe device driver) to pass its interrupt resources
information to DFL framework for enumeration, and also adds interrupt
enumeration code in framework to parse and assign interrupt resources
for enumerated feature devices and their own sub features.

With this patch, DFL framework enumerates interrupt resources for core
features, including PORT Error Reporting, FME (FPGA Management Engine)
Error Reporting and also AFU User Interrupts.

Signed-off-by: Luwei Kang &lt;luwei.kang@intel.com&gt;
Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Reviewed-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Acked-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: Use struct_size() in kzalloc()</title>
<updated>2020-06-19T01:22:12+00:00</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavoars@kernel.org</email>
</author>
<published>2020-06-17T22:10:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=e1d9ec3af3463c1721723f68403ee14214d0d2f6'/>
<id>e1d9ec3af3463c1721723f68403ee14214d0d2f6</id>
<content type='text'>
Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes. Also, remove unnecessary
function dfl_feature_platform_data_size().

This code was detected with the help of Coccinelle and, audited and
fixed manually.

Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes. Also, remove unnecessary
function dfl_feature_platform_data_size().

This code was detected with the help of Coccinelle and, audited and
fixed manually.

Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>fpga: dfl: support multiple opens on feature device node.</title>
<updated>2020-04-30T03:37:07+00:00</updated>
<author>
<name>Xu Yilun</name>
<email>yilun.xu@intel.com</email>
</author>
<published>2019-11-18T05:20:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=b6862193ca12e4bce6a18f31bb36eaa6d801b377'/>
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Each DFL functional block, e.g. AFU (Accelerated Function Unit) and FME
(FPGA Management Engine), could implement more than one function within
its region, but current driver only allows one user application to access
it by exclusive open on device node. So this is not convenient and
flexible for userspace applications, as they have to combine lots of
different functions into one single application.

This patch removes the limitation here to allow multiple opens to each
feature device node for AFU and FME from userspace applications. If user
still needs exclusive access to these device node, O_EXCL flag must be
issued together with open.

Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
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Each DFL functional block, e.g. AFU (Accelerated Function Unit) and FME
(FPGA Management Engine), could implement more than one function within
its region, but current driver only allows one user application to access
it by exclusive open on device node. So this is not convenient and
flexible for userspace applications, as they have to combine lots of
different functions into one single application.

This patch removes the limitation here to allow multiple opens to each
feature device node for AFU and FME from userspace applications. If user
still needs exclusive access to these device node, O_EXCL flag must be
issued together with open.

Signed-off-by: Wu Hao &lt;hao.wu@intel.com&gt;
Signed-off-by: Xu Yilun &lt;yilun.xu@intel.com&gt;
Signed-off-by: Moritz Fischer &lt;mdf@kernel.org&gt;
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