<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/gpu/drm/xe/xe_exec_queue.c, branch v6.18.21</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>drm/xe/uapi: disallow bind queue sharing</title>
<updated>2026-01-30T09:32:19+00:00</updated>
<author>
<name>Matthew Auld</name>
<email>matthew.auld@intel.com</email>
</author>
<published>2026-01-20T11:06:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9bba27c222e0e7576981bdb61a93b1c61ccb618c'/>
<id>9bba27c222e0e7576981bdb61a93b1c61ccb618c</id>
<content type='text'>
[ Upstream commit 6f4b7aed61817624250e590ba0ef304146d34614 ]

Currently this is very broken if someone attempts to create a bind
queue and share it across multiple VMs. For example currently we assume
it is safe to acquire the user VM lock to protect some of the bind queue
state, but if allow sharing the bind queue with multiple VMs then this
quickly breaks down.

To fix this reject using a bind queue with any VM that is not the same
VM that was originally passed when creating the bind queue. This a uAPI
change, however this was more of an oversight on kernel side that we
didn't reject this, and expectation is that userspace shouldn't be using
bind queues in this way, so in theory this change should go unnoticed.

Based on a patch from Matt Brost.

v2 (Matt B):
  - Hold the vm lock over queue create, to ensure it can't be closed as
    we attach the user_vm to the queue.
  - Make sure we actually check for NULL user_vm in destruction path.
v3:
  - Fix error path handling.

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Reported-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Cc: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Michal Mrozek &lt;michal.mrozek@intel.com&gt;
Cc: Carl Zhang &lt;carl.zhang@intel.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v6.8+
Acked-by: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Arvind Yadav &lt;arvind.yadav@intel.com&gt;
Acked-by: Michal Mrozek &lt;michal.mrozek@intel.com&gt;
Link: https://patch.msgid.link/20260120110609.77958-3-matthew.auld@intel.com
(cherry picked from commit 9dd08fdecc0c98d6516c2d2d1fa189c1332f8dab)
Signed-off-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Stable-dep-of: 772157f626d0 ("drm/xe/migrate: fix job lock assert")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ Upstream commit 6f4b7aed61817624250e590ba0ef304146d34614 ]

Currently this is very broken if someone attempts to create a bind
queue and share it across multiple VMs. For example currently we assume
it is safe to acquire the user VM lock to protect some of the bind queue
state, but if allow sharing the bind queue with multiple VMs then this
quickly breaks down.

To fix this reject using a bind queue with any VM that is not the same
VM that was originally passed when creating the bind queue. This a uAPI
change, however this was more of an oversight on kernel side that we
didn't reject this, and expectation is that userspace shouldn't be using
bind queues in this way, so in theory this change should go unnoticed.

Based on a patch from Matt Brost.

v2 (Matt B):
  - Hold the vm lock over queue create, to ensure it can't be closed as
    we attach the user_vm to the queue.
  - Make sure we actually check for NULL user_vm in destruction path.
v3:
  - Fix error path handling.

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Reported-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Cc: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Michal Mrozek &lt;michal.mrozek@intel.com&gt;
Cc: Carl Zhang &lt;carl.zhang@intel.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v6.8+
Acked-by: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Arvind Yadav &lt;arvind.yadav@intel.com&gt;
Acked-by: Michal Mrozek &lt;michal.mrozek@intel.com&gt;
Link: https://patch.msgid.link/20260120110609.77958-3-matthew.auld@intel.com
(cherry picked from commit 9dd08fdecc0c98d6516c2d2d1fa189c1332f8dab)
Signed-off-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Stable-dep-of: 772157f626d0 ("drm/xe/migrate: fix job lock assert")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe: Enforce correct user fence signaling order using</title>
<updated>2025-11-07T11:55:19+00:00</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2025-10-31T23:40:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=0995c2fc39b0f998d40f5d276f67ae22fc1c37c3'/>
<id>0995c2fc39b0f998d40f5d276f67ae22fc1c37c3</id>
<content type='text'>
Prevent application hangs caused by out-of-order fence signaling when
user fences are attached. Use drm_syncobj (via dma-fence-chain) to
guarantee that each user fence signals in order, regardless of the
signaling order of the attached fences. Ensure user fence writebacks to
user space occur in the correct sequence.

v7:
 - Skip drm_syncbj create of error (CI)

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patch.msgid.link/20251031234050.3043507-2-matthew.brost@intel.com
(cherry picked from commit adda4e855ab6409a3edaa585293f1f2069ab7299)
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Prevent application hangs caused by out-of-order fence signaling when
user fences are attached. Use drm_syncobj (via dma-fence-chain) to
guarantee that each user fence signals in order, regardless of the
signaling order of the attached fences. Ensure user fence writebacks to
user space occur in the correct sequence.

v7:
 - Skip drm_syncbj create of error (CI)

Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Link: https://patch.msgid.link/20251031234050.3043507-2-matthew.brost@intel.com
(cherry picked from commit adda4e855ab6409a3edaa585293f1f2069ab7299)
Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe: Fix error handling if PXP fails to start</title>
<updated>2025-09-16T22:54:28+00:00</updated>
<author>
<name>Daniele Ceraolo Spurio</name>
<email>daniele.ceraolospurio@intel.com</email>
</author>
<published>2025-09-09T22:12:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=626667321deb4c7a294725406faa3dd71c3d445d'/>
<id>626667321deb4c7a294725406faa3dd71c3d445d</id>
<content type='text'>
Since the PXP start comes after __xe_exec_queue_init() has completed,
we need to cleanup what was done in that function in case of a PXP
start error.
__xe_exec_queue_init calls the submission backend init() function,
so we need to introduce an opposite for that. Unfortunately, while
we already have a fini() function pointer, it performs other
operations in addition to cleaning up what was done by the init().
Therefore, for clarity, the existing fini() has been renamed to
destroy(), while a new fini() has been added to only clean up what was
done by the init(), with the latter being called by the former (via
xe_exec_queue_fini).

Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support for PXP-using queues")
Signed-off-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Cc: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Signed-off-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Link: https://lore.kernel.org/r/20250909221240.3711023-3-daniele.ceraolospurio@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since the PXP start comes after __xe_exec_queue_init() has completed,
we need to cleanup what was done in that function in case of a PXP
start error.
__xe_exec_queue_init calls the submission backend init() function,
so we need to introduce an opposite for that. Unfortunately, while
we already have a fini() function pointer, it performs other
operations in addition to cleaning up what was done by the init().
Therefore, for clarity, the existing fini() has been renamed to
destroy(), while a new fini() has been added to only clean up what was
done by the init(), with the latter being called by the former (via
xe_exec_queue_fini).

Fixes: 72d479601d67 ("drm/xe/pxp/uapi: Add userspace and LRC support for PXP-using queues")
Signed-off-by: Daniele Ceraolo Spurio &lt;daniele.ceraolospurio@intel.com&gt;
Cc: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Cc: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Signed-off-by: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Link: https://lore.kernel.org/r/20250909221240.3711023-3-daniele.ceraolospurio@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe: s/tlb_invalidation/tlb_inval</title>
<updated>2025-08-27T18:49:00+00:00</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2025-08-26T18:29:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=c697ddcf27bd5c71b89539a9b79b7d078777b394'/>
<id>c697ddcf27bd5c71b89539a9b79b7d078777b394</id>
<content type='text'>
tlb_invalidation is a bit verbose leading to ugly wraps in the code,
shorten to tlb_inval.

Signed-off-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://lore.kernel.org/r/20250826182911.392550-4-stuart.summers@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
tlb_invalidation is a bit verbose leading to ugly wraps in the code,
shorten to tlb_inval.

Signed-off-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://lore.kernel.org/r/20250826182911.392550-4-stuart.summers@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe/vf: Refactor CCS save/restore to use default migration context</title>
<updated>2025-08-08T17:29:37+00:00</updated>
<author>
<name>Satyanarayana K V P</name>
<email>satyanarayana.k.v.p@intel.com</email>
</author>
<published>2025-08-08T07:36:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9f8aa0bcd1f35baefe083adfa26bc6f9f68f652b'/>
<id>9f8aa0bcd1f35baefe083adfa26bc6f9f68f652b</id>
<content type='text'>
Previously, CCS save/restore operations created separate migration
contexts with new VM memory allocations, resulting in significant
overhead.

This commit eliminates redundant context creation reusing the default
migration context by registering new execution queues for CCS save and
restore on the existing migrate VM.

Signed-off-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Suggested-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://lore.kernel.org/r/20250808073628.32745-2-satyanarayana.k.v.p@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Previously, CCS save/restore operations created separate migration
contexts with new VM memory allocations, resulting in significant
overhead.

This commit eliminates redundant context creation reusing the default
migration context by registering new execution queues for CCS save and
restore on the existing migrate VM.

Signed-off-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Suggested-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: John Harrison &lt;John.C.Harrison@Intel.com&gt;
Reviewed-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Link: https://lore.kernel.org/r/20250808073628.32745-2-satyanarayana.k.v.p@intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe/vf: Refresh utilization buffer during migration recovery</title>
<updated>2025-08-04T14:47:07+00:00</updated>
<author>
<name>Tomasz Lis</name>
<email>tomasz.lis@intel.com</email>
</author>
<published>2025-08-02T03:10:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=168b5867318bff761c9095d12115c302c483d66a'/>
<id>168b5867318bff761c9095d12115c302c483d66a</id>
<content type='text'>
The WA buffer we use to capture context utilization contains GGTT
references. This means its instructions have to be either fixed or
re-emitted during VF post-migration recovery.

This patch adds re-emitting content of the utilization WA BB during
the recovery.

The way we write to vram requires scratch buffer to be used before
the whole block is memcopied. We are re-using a scratch buffer
introduced in earlier part of the recovery. This is not a performance
optimization, but a necessity to avoid creating dependencies between
locks.

v2: Notable rebase after "Prepare WA BB setup for more users" patch
v3: Added error propagation

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-8-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The WA buffer we use to capture context utilization contains GGTT
references. This means its instructions have to be either fixed or
re-emitted during VF post-migration recovery.

This patch adds re-emitting content of the utilization WA BB during
the recovery.

The way we write to vram requires scratch buffer to be used before
the whole block is memcopied. We are re-using a scratch buffer
introduced in earlier part of the recovery. This is not a performance
optimization, but a necessity to avoid creating dependencies between
locks.

v2: Notable rebase after "Prepare WA BB setup for more users" patch
v3: Added error propagation

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-8-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe/vf: Post migration, repopulate ring area for pending request</title>
<updated>2025-08-04T14:46:56+00:00</updated>
<author>
<name>Tomasz Lis</name>
<email>tomasz.lis@intel.com</email>
</author>
<published>2025-08-02T03:10:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=a0dda25d24e636df5c30a9370464b7cebc709faf'/>
<id>a0dda25d24e636df5c30a9370464b7cebc709faf</id>
<content type='text'>
The commands within ring area allocated for a request may contain
references to GGTT. These references require update after VF
migration, in order to continue any preempted LRCs, or jobs which
were emitted to the ring but not sent to GuC yet.

This change calls the emit function again for all such jobs,
as part of post-migration recovery.

v2: Moved few functions to better files
v3: Take job_list_lock
v4: Rephrased comments

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Reviewed-by: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-7-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The commands within ring area allocated for a request may contain
references to GGTT. These references require update after VF
migration, in order to continue any preempted LRCs, or jobs which
were emitted to the ring but not sent to GuC yet.

This change calls the emit function again for all such jobs,
as part of post-migration recovery.

v2: Moved few functions to better files
v3: Take job_list_lock
v4: Rephrased comments

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Cc: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Reviewed-by: Jonathan Cavitt &lt;jonathan.cavitt@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-7-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe/vf: Rebase MEMIRQ structures for all contexts after migration</title>
<updated>2025-08-04T14:46:52+00:00</updated>
<author>
<name>Tomasz Lis</name>
<email>tomasz.lis@intel.com</email>
</author>
<published>2025-08-02T03:10:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=30d137ddcee514d3ee5a498713628bd50d41e87b'/>
<id>30d137ddcee514d3ee5a498713628bd50d41e87b</id>
<content type='text'>
All contexts require an update of state data, as the data includes
GGTT references to memirq-related buffers.

Default contexts need these references updated as well, because they
are not refreshed when a new context is created from them.

The way we write to vram requires scratch buffer to be used
before the whole block is memcopied. Since using kalloc() within
specific recovery functions would lead to unintended relations
between locks, we are allocating the buffer earlier, before
any locks are taken. The same buffer will be used for other steps
of the recovery.

v2: Update addresses by xe_lrc_write_ctx_reg() rather than
  set_memory_based_intr()
v3: Renamed parameter, reordered parameters in some functs
v4: Check if have MEMIRQ, move `xe_gt*` funct to proper file
v5: Revert back to requiring scratch buffer, but allocate it
  earlier this time

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-6-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All contexts require an update of state data, as the data includes
GGTT references to memirq-related buffers.

Default contexts need these references updated as well, because they
are not refreshed when a new context is created from them.

The way we write to vram requires scratch buffer to be used
before the whole block is memcopied. Since using kalloc() within
specific recovery functions would lead to unintended relations
between locks, we are allocating the buffer earlier, before
any locks are taken. The same buffer will be used for other steps
of the recovery.

v2: Update addresses by xe_lrc_write_ctx_reg() rather than
  set_memory_based_intr()
v3: Renamed parameter, reordered parameters in some functs
v4: Check if have MEMIRQ, move `xe_gt*` funct to proper file
v5: Revert back to requiring scratch buffer, but allocate it
  earlier this time

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-6-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe/vf: Rebase HWSP of all contexts after migration</title>
<updated>2025-08-04T14:46:47+00:00</updated>
<author>
<name>Tomasz Lis</name>
<email>tomasz.lis@intel.com</email>
</author>
<published>2025-08-02T03:10:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=b46ef766737c4ecc11aad9742fd7f70f8f922246'/>
<id>b46ef766737c4ecc11aad9742fd7f70f8f922246</id>
<content type='text'>
All contexts require an update due to GGTT range shift, as that
affects their HWSP.

The HW status page of a context contains GGTT references, which
need to be shifted to a new range (or re-computed using the
previously updated vma nodes). The references include ring start
address and indirect state address.

v2: move some functions to better matched files
v3: Add missing kerneldocs
v4: Style fix

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-5-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All contexts require an update due to GGTT range shift, as that
affects their HWSP.

The HW status page of a context contains GGTT references, which
need to be shifted to a new range (or re-computed using the
previously updated vma nodes). The references include ring start
address and indirect state address.

v2: move some functions to better matched files
v3: Add missing kerneldocs
v4: Style fix

Signed-off-by: Tomasz Lis &lt;tomasz.lis@intel.com&gt;
Cc: Michal Wajdeczko &lt;michal.wajdeczko@intel.com&gt;
Cc: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Acked-by: Satyanarayana K V P &lt;satyanarayana.k.v.p@intel.com&gt;
Reviewed-by: Michal Winiarski &lt;michal.winiarski@intel.com&gt;
Link: https://lore.kernel.org/r/20250802031045.1127138-5-tomasz.lis@intel.com
Signed-off-by: Michał Winiarski &lt;michal.winiarski@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drm/xe: Add dependency scheduler for GT TLB invalidations to bind queues</title>
<updated>2025-07-25T01:25:59+00:00</updated>
<author>
<name>Matthew Brost</name>
<email>matthew.brost@intel.com</email>
</author>
<published>2025-07-24T19:12:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=535c445eb94c9abce3350aa61424fc34b8138ee8'/>
<id>535c445eb94c9abce3350aa61424fc34b8138ee8</id>
<content type='text'>
Add a generic dependency scheduler for GT TLB invalidations, used to
schedule jobs that issue GT TLB invalidations to bind queues.

v2:
 - Use shared GT TLB invalidation queue for dep scheduler
 - Break allocation of dep scheduler into its own function
 - Add define for max number tlb invalidations
 - Skip media if not present

Suggested-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Link: https://lore.kernel.org/r/20250724191216.4076566-5-matthew.brost@intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a generic dependency scheduler for GT TLB invalidations, used to
schedule jobs that issue GT TLB invalidations to bind queues.

v2:
 - Use shared GT TLB invalidation queue for dep scheduler
 - Break allocation of dep scheduler into its own function
 - Add define for max number tlb invalidations
 - Skip media if not present

Suggested-by: Thomas Hellström &lt;thomas.hellstrom@linux.intel.com&gt;
Signed-off-by: Matthew Brost &lt;matthew.brost@intel.com&gt;
Reviewed-by: Stuart Summers &lt;stuart.summers@intel.com&gt;
Link: https://lore.kernel.org/r/20250724191216.4076566-5-matthew.brost@intel.com
</pre>
</div>
</content>
</entry>
</feed>
