linux.git/drivers/iio/adc, branch v4.19.18

iio: adc: at91: fix wrong channel number in triggered buffer mode

2018-11-13T19:08:47+00:00

commit aea835f2dc8a682942b859179c49ad1841a6c8b9 upstream.

When channels are registered, the hardware channel number is not the
actual iio channel number.
This is because the driver is probed with a certain number of accessible
channels. Some pins are routed and some not, depending on the description of
the board in the DT.
Because of that, channels 0,1,2,3 can correspond to hardware channels
2,3,4,5 for example.
In the buffered triggered case, we need to do the translation accordingly.
Fixed the channel number to stop reading the wrong channel.

Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard 
Signed-off-by: Eugen Hristev 
Acked-by: Ludovic Desroches 
Cc: 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Greg Kroah-Hartman

iio: adc: at91: fix acking DRDY irq on simple conversions

2018-11-13T19:08:47+00:00

commit bc1b45326223e7e890053cf6266357adfa61942d upstream.

When doing simple conversions, the driver did not acknowledge the DRDY irq.
If this irq status is not acked, it will be left pending, and as soon as a
trigger is enabled, the irq handler will be called, it doesn't know why
this status has occurred because no channel is pending, and then it will go
int a irq loop and board will hang.
To avoid this situation, read the LCDR after a raw conversion is done.

Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard 
Signed-off-by: Eugen Hristev 
Acked-by: Ludovic Desroches 
Cc: 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Greg Kroah-Hartman

iio: adc: imx25-gcq: Fix leak of device_node in mx25_gcq_setup_cfgs()

2018-11-13T19:08:47+00:00

commit d3fa21c73c391975488818b085b894c2980ea052 upstream.

Leaving for_each_child_of_node loop we should release child device node,
if it is not stored for future use.

Found by Linux Driver Verification project (linuxtesting.org).

JC: I'm not sending this as a quick fix as it's been wrong for years,
but good to pick up for stable after the merge window.

Signed-off-by: Alexey Khoroshilov 
Fixes: 6df2e98c3ea56 ("iio: adc: Add imx25-gcq ADC driver")
Cc: 
Signed-off-by: Jonathan Cameron 
Signed-off-by: Greg Kroah-Hartman

iio: adc: xilinx: Move request_irq before enabling interrupts

2018-07-29T12:30:35+00:00

Enabling the Interrupts before registering the irq handler is a bad
idea. This patch corrects the same for XADC driver.

Signed-off-by: Manish Narani 
Signed-off-by: Jonathan Cameron

iio: adc: xilinx: Remove platform_get_irq from xadc_remove function

2018-07-29T11:52:21+00:00

This patch avoids getting irq number in xadc_remove function. Instead
store 'irq' in xadc struct and use xadc->irq wherever needed.
This patch also resolves a warning reported by coverity where it asks to
check return value of platform_get_irq() for any errors in xadc_remove.

Signed-off-by: Manish Narani 
Signed-off-by: Jonathan Cameron

iio: adc: xilinx: limit pcap clock frequency value

2018-07-29T11:49:48+00:00

This patch limits the xadc pcap clock frequency value to be less than
200MHz. This fixes the issue when zynq is booted at higher frequency
values, pcap crosses the maximum limit of 200MHz(Fmax) as it is derived
from IOPLL.
If this limit is crossed it is required to alter the WEDGE and REDGE
bits of XADC_CFG register to make timings better in the interface. So to
avoid alteration of these bits every time, the pcap value should not
cross the Fmax limit.

Signed-off-by: Manish Narani 
Signed-off-by: Jonathan Cameron

iio: adc: xilinx: Check for return values in clk related functions

2018-07-29T11:46:38+00:00

This patch adds check for return values from clock related functions.
This was reported by static code analysis tool.

Signed-off-by: Manish Narani 
Signed-off-by: Jonathan Cameron

iio: ad_sigma_delta: use unsigned long for timeout

2018-07-28T11:15:03+00:00

wait_for_completion_timeout returns unsigned long not int so an appropriate
variable is declared and the assignment and check fixed up.

Signed-off-by: Nicholas Mc Guire 
Reviewed-by: Alexandru Ardelean 
Signed-off-by: Jonathan Cameron

iio: adc: meson-saradc: add support for the Meson8m2 SoCs

2018-07-23T18:18:13+00:00

The SAR ADC on Meson8m2 behaves identical to the one found in the
Meson8b SoCs. Add a separate compatible string because the temperature
sensor logic (not supported yet) differs between Meson8 and Meson8m2
(however, it's the same for Meson8b and Meson8m2).

Signed-off-by: Martin Blumenstingl 
Signed-off-by: Jonathan Cameron

iio: adc: ti-ads7950: allow simultaneous use of buffer and direct mode

2018-07-23T18:18:12+00:00

This modifies the TI ADS7950 A/DC driver to allow the simultaneous use
of both the triggered buffer and reading channels directly (via in-
kernel API or sysfs).

The use case for this is on LEGO MINDSTORMS EV3. Two of the voltage
channels are used in-kernel by a power supply driver, which reads the
values using iio_read_channel_processed(). These channels are only read
at a slow rate (<= 1Hz).  However, we want to be able to read 12 other
channels at the same time using the triggered buffer at a high rate (>=
100Hz).

Signed-off-by: David Lechner 
Signed-off-by: Jonathan Cameron