<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/memory/tegra, branch v5.18</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>memory: tegra: Constify struct thermal_cooling_device_ops</title>
<updated>2022-01-27T09:41:54+00:00</updated>
<author>
<name>Rikard Falkeborn</name>
<email>rikard.falkeborn@gmail.com</email>
</author>
<published>2021-11-28T20:41:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=0123af535b9c090cf05dcf500f9303bae5849691'/>
<id>0123af535b9c090cf05dcf500f9303bae5849691</id>
<content type='text'>
The only usage of tegra210_emc_cd_ops is to pass its address to
devm_thermal_of_cooling_device_register() which is a pointer to const
struct thermal_cooling_device_ops. Make it const to allow the compiler
to put it in read-only memory.

Signed-off-by: Rikard Falkeborn &lt;rikard.falkeborn@gmail.com&gt;
Link: https://lore.kernel.org/r/20211128204158.19544-1-rikard.falkeborn@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The only usage of tegra210_emc_cd_ops is to pass its address to
devm_thermal_of_cooling_device_register() which is a pointer to const
struct thermal_cooling_device_ops. Make it const to allow the compiler
to put it in read-only memory.

Signed-off-by: Rikard Falkeborn &lt;rikard.falkeborn@gmail.com&gt;
Link: https://lore.kernel.org/r/20211128204158.19544-1-rikard.falkeborn@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra20-emc: Correct memory device mask</title>
<updated>2022-01-27T09:40:35+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-12-22T04:32:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=9ff684342ee7d3ea2755c6e9b60bc43085baa3ad'/>
<id>9ff684342ee7d3ea2755c6e9b60bc43085baa3ad</id>
<content type='text'>
Memory chip select is swapped when we read mode register, correct it.
We didn't have devices that use a single LPDDR chip and both chips are
always identical, hence this change is just a minor improvement.

Fixes: 131dd9a436d8 ("memory: tegra20-emc: Support matching timings by LPDDR2 configuration")
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211222043215.28237-2-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Memory chip select is swapped when we read mode register, correct it.
We didn't have devices that use a single LPDDR chip and both chips are
always identical, hence this change is just a minor improvement.

Fixes: 131dd9a436d8 ("memory: tegra20-emc: Support matching timings by LPDDR2 configuration")
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211222043215.28237-2-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra30-emc: Print additional memory info</title>
<updated>2022-01-27T09:40:34+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-12-22T04:32:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=e3aabb3c7dbe66201b45d7b2c20132196f491ad4'/>
<id>e3aabb3c7dbe66201b45d7b2c20132196f491ad4</id>
<content type='text'>
Print out memory type and LPDDR2 configuration on Tegra30, making it
similar to the memory info printed by the Tegra20 memory driver. This
info is useful for debugging purposes.

Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # T30 ASUS TF201 LPDDR2
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211222043215.28237-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Print out memory type and LPDDR2 configuration on Tegra30, making it
similar to the memory info printed by the Tegra20 memory driver. This
info is useful for debugging purposes.

Tested-by: Svyatoslav Ryhel &lt;clamor95@gmail.com&gt; # T30 ASUS TF201 LPDDR2
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211222043215.28237-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers</title>
<updated>2021-10-21T19:34:21+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-10-21T19:34:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=bccb5d53e259c56a2c7277441f2aa54cacc4267e'/>
<id>bccb5d53e259c56a2c7277441f2aa54cacc4267e</id>
<content type='text'>
Memory controller drivers for v5.16, part two

1. Convert LPDDR2 bindings to dtschema and extend them with new
   properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
   devicetree.

* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra20-emc: Add runtime dependency on devfreq governor module
  memory: tegra20-emc: Support matching timings by LPDDR2 configuration
  memory: Add LPDDR2-info helpers
  dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
  dt-bindings: Add vendor prefix for Elpida Memory
  dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
  dt-bindings: memory: lpddr2: Add revision-id properties
  dt-bindings: memory: lpddr2: Convert to schema
  dt-bindings: Relocate DDR bindings

Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Memory controller drivers for v5.16, part two

1. Convert LPDDR2 bindings to dtschema and extend them with new
   properties.
2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from
   devicetree.

* tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: tegra20-emc: Add runtime dependency on devfreq governor module
  memory: tegra20-emc: Support matching timings by LPDDR2 configuration
  memory: Add LPDDR2-info helpers
  dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
  dt-bindings: Add vendor prefix for Elpida Memory
  dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
  dt-bindings: memory: lpddr2: Add revision-id properties
  dt-bindings: memory: lpddr2: Convert to schema
  dt-bindings: Relocate DDR bindings

Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra20-emc: Add runtime dependency on devfreq governor module</title>
<updated>2021-10-21T09:18:08+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-10-19T23:15:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=14b43c20c283de36131da0cb44f3170b9ffa7630'/>
<id>14b43c20c283de36131da0cb44f3170b9ffa7630</id>
<content type='text'>
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq
governor to the list of the Tegra20 EMC driver module softdeps to allow
userspace initramfs tools like dracut to automatically pull the devfreq
module into ramfs image together with the EMC module.

Reported-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Suggested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Tegra20 EMC driver uses simple devfreq governor. Add simple devfreq
governor to the list of the Tegra20 EMC driver module softdeps to allow
userspace initramfs tools like dracut to automatically pull the devfreq
module into ramfs image together with the EMC module.

Reported-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Suggested-by: Nicolas Chauvet &lt;kwizart@gmail.com&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211019231524.888-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra20-emc: Support matching timings by LPDDR2 configuration</title>
<updated>2021-10-15T07:52:47+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-10-06T22:46:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=131dd9a436d8f6dbaf3d9597803765d271b2fc19'/>
<id>131dd9a436d8f6dbaf3d9597803765d271b2fc19</id>
<content type='text'>
ASUS Transformer TF101 doesn't provide RAM code and in this case memory
timings should be selected based on identity information read out from
SDRAM chip. Support matching timings by LPDDR2 configuration.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
ASUS Transformer TF101 doesn't provide RAM code and in this case memory
timings should be selected based on identity information read out from
SDRAM chip. Support matching timings by LPDDR2 configuration.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20211006224659.21434-10-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra210-emc: replace DEFINE_SIMPLE_ATTRIBUTE with</title>
<updated>2021-10-07T18:37:33+00:00</updated>
<author>
<name>Kai Song</name>
<email>songkai01@inspur.com</email>
</author>
<published>2021-10-05T04:35:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=31b88d85f0432e1c0738fe0714191e8504f505c3'/>
<id>31b88d85f0432e1c0738fe0714191e8504f505c3</id>
<content type='text'>
fix debugfs_simple_attr.cocci warning:
drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace
DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same
warning, but didn't fix all matches in this file at once.

Signed-off-by: Kai Song &lt;songkai01@inspur.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
fix debugfs_simple_attr.cocci warning:
drivers/memory/tegra/tegra210-emc-core.c:1665:0-23: WARNING:tegra210_emc_debug_min_rate_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE

Commit 6fc5f1adf5a1 ("memory: tegra210-emc: replace
DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE") fixed the same
warning, but didn't fix all matches in this file at once.

Signed-off-by: Kai Song &lt;songkai01@inspur.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211005043514.9650-1-songkai01@inspur.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra186-emc: Fix error return code in tegra186_emc_probe()</title>
<updated>2021-10-07T18:32:33+00:00</updated>
<author>
<name>Yang Yingliang</name>
<email>yangyingliang@huawei.com</email>
</author>
<published>2021-09-28T02:15:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=982ca19a09ac0365ad1409f919da43596d2a2276'/>
<id>982ca19a09ac0365ad1409f919da43596d2a2276</id>
<content type='text'>
Return the error code when command fails.

Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response")
Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Return the error code when command fails.

Fixes: 13324edbe926 ("memory: tegra186-emc: Handle errors in BPMP response")
Signed-off-by: Yang Yingliang &lt;yangyingliang@huawei.com&gt;
Reviewed-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210928021545.3774677-1-yangyingliang@huawei.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra: Make use of the helper function devm_add_action_or_reset()</title>
<updated>2021-09-24T11:18:47+00:00</updated>
<author>
<name>Cai Huoqing</name>
<email>caihuoqing@baidu.com</email>
</author>
<published>2021-09-22T13:00:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=1d8e0223bb52071ffc59391f0ebefa06ce5643d7'/>
<id>1d8e0223bb52071ffc59391f0ebefa06ce5643d7</id>
<content type='text'>
Use devm_add_action_or_reset() instead of devm_add_action() to simplify
the error handling.

Signed-off-by: Cai Huoqing &lt;caihuoqing@baidu.com&gt;
Link: https://lore.kernel.org/r/20210922130002.586-1-caihuoqing@baidu.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use devm_add_action_or_reset() instead of devm_add_action() to simplify
the error handling.

Signed-off-by: Cai Huoqing &lt;caihuoqing@baidu.com&gt;
Link: https://lore.kernel.org/r/20210922130002.586-1-caihuoqing@baidu.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>memory: tegra186-emc: Handle errors in BPMP response</title>
<updated>2021-09-20T08:33:28+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2021-09-15T08:55:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=13324edbe9269e6fbca4d0f5146b18ef8478c958'/>
<id>13324edbe9269e6fbca4d0f5146b18ef8478c958</id>
<content type='text'>
The return value from tegra_bpmp_transfer indicates the success or
failure of the IPC transaction with BPMP. If the transaction
succeeded, we also need to check the actual command's result code.
Add code to do this.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210915085517.1669675-3-mperttunen@nvidia.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The return value from tegra_bpmp_transfer indicates the success or
failure of the IPC transaction with BPMP. If the transaction
succeeded, we also need to check the actual command's result code.
Add code to do this.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210915085517.1669675-3-mperttunen@nvidia.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
