linux.git/drivers/pci/endpoint, branch v4.18.12

PCI: endpoint: Fix NULL pointer dereference error when CONFIGFS is disabled

2018-07-09T20:19:51+00:00

commit ef1433f717a2 ("PCI: endpoint: Create configfs entry for each
pci_epf_device_id table entry") while adding configfs entry for each
pci_epf_device_id table entry introduced a NULL pointer dereference error
when CONFIG_PCI_ENDPOINT_CONFIGFS is not enabled.

Fix it here.

Fixes: ef1433f717a2 ("PCI: endpoint: Create configfs entry for each
pci_epf_device_id table entry")
Signed-off-by: Kishon Vijay Abraham I 
[lorenzo.pieralisi: updated commit log]
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas

PCI: endpoint: Use after free in pci_epf_unregister_driver()

2018-06-29T18:49:24+00:00

We need to use list_for_each_entry_safe() because the
pci_ep_cfs_remove_epf_group() function frees "group".

Fixes: ef1433f717a2 ("PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry")
Signed-off-by: Dan Carpenter 
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Bjorn Helgaas 
Acked-by: Kishon Vijay Abraham I

Merge branch 'lorenzo/pci/endpoint'

2018-06-06T21:10:30+00:00

  - use usleep() instead of mdelay() in endpoint test (Jia-Ju Bai)

  - add configfs entries for pci_epf_driver device IDs (Kishon Vijay
    Abraham I)

  - clean up pci_endpoint_test driver (Gustavo Pimentel)

* lorenzo/pci/endpoint:
  PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry
  misc: pci_endpoint_test: Use pci_irq_vector function
  PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters
  misc: pci_endpoint_test: Replace lower into upper case characters
  PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()

PCI: endpoint: Create configfs entry for each pci_epf_device_id table entry

2018-05-18T15:40:50+00:00

In order to be able to provide correct driver_data for pci_epf device,
a separate configfs entry for each pci_epf_device_id table entry in
pci_epf_driver is required.

Add support to create configfs entry for each pci_epf_device_id
table entry here.

Signed-off-by: Kishon Vijay Abraham I 
Signed-off-by: Lorenzo Pieralisi 
Tested-by: Gustavo Pimentel

PCI: dwc: Add support for EP mode

2018-05-15T14:51:38+00:00

The PCIe controller dual mode is capable of operating in Root Complex
(RC) mode as well as EP mode by configuration option.

Add EP support to the DesignWare driver on top of RC mode support.

Add new property on pci_epc structure which allow to configure
pci_epf_test driver accordingly to the controller specific requirements.

Signed-off-by: Gustavo Pimentel 
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Kishon Vijay Abraham I

PCI: endpoint: functions/pci-epf-test: Replace lower into upper case characters

2018-05-15T14:13:10+00:00

Replace all initial lower case character into upper case in comments
and debug printks.

Signed-off-by: Gustavo Pimentel 
Signed-off-by: Lorenzo Pieralisi

PCI: endpoint: Replace mdelay with usleep_range() in pci_epf_test_write()

2018-05-08T10:13:42+00:00

pci_epf_test_write() is never called in atomic context.

The call chain ending up at pci_epf_test_write() is:
[1] pci_epf_test_write() <- pci_epf_test_cmd_handler()

pci_epf_test_cmd_handler() is set as a parameter of INIT_DELAYED_WORK()
in pci_epf_test_probe().
This function is not called in atomic context.

Despite never getting called from atomic context, pci_epf_test_write()
calls mdelay() to busy wait.

This is not necessary and can be replaced with usleep_range() to
avoid busy waiting.

Signed-off-by: Jia-Ju Bai 
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Kishon Vijay Abraham I

PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing

2018-04-03T11:38:05+00:00

Since a 64-bit BAR consists of a BAR pair, and since there is no
BAR after BAR_5, BAR_5 cannot be 64-bits wide.

This sanity check is done in pci_epc_clear_bar(), so that we don't need
to do this sanity check in all epc->ops->clear_bar() implementations.

Signed-off-by: Niklas Cassel 
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Kishon Vijay Abraham I

PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar

2018-04-03T11:38:05+00:00

Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar.

This is needed so that epc->ops->clear_bar() can clear the BAR pair,
if the BAR is 64-bits wide.

This also makes it possible for pci_epc_clear_bar() to sanity check
the flags.

Signed-off-by: Niklas Cassel 
Signed-off-by: Lorenzo Pieralisi 
Reviewed-by: Gustavo Pimentel

PCI: endpoint: Handle 64-bit BARs properly

2018-04-03T11:38:04+00:00

If a 64-bit BAR was set-up, we need to skip a BAR,
since a 64-bit BAR consists of a BAR pair.

We need to check what BAR width the epc->ops->set_bar() specific
implementation actually did set-up, since some drivers, like the
Cadence EP controller, sometimes sets up a 64-bit BAR, even though
a 32-bit BAR was requested.

Signed-off-by: Niklas Cassel 
Signed-off-by: Lorenzo Pieralisi 
Acked-by: Kishon Vijay Abraham I