linux.git/drivers/rtc/rtc-pcf2127.c, branch v5.18

rtc: pcf2127: set RTC_FEATURE_ALARM_RES_2S

2022-03-23T18:58:39+00:00

The PCF2127 doesn't support UIE because setting an alarm to fire every
second confuses the chip and the fastest we can go is an alarm every 2
seconds.

Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20220309162301.61679-11-alexandre.belloni@bootlin.com

rtc: pcf2127: switch to RTC_FEATURE_UPDATE_INTERRUPT

2022-03-23T18:58:39+00:00

Stop using uie_unsupported and clear RTC_FEATURE_UPDATE_INTERRUPT instead.

Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20220309162301.61679-10-alexandre.belloni@bootlin.com

rtc: pcf2127: fix bug when reading alarm registers

2022-02-15T22:35:43+00:00

The first bug is that reading the 5 alarm registers results in a read
operation of 20 bytes. The reason is because the destination buffer is
defined as an array of "unsigned int", and we use the sizeof()
operator on this array to define the bulk read count.

The second bug is that the read value is invalid, because we are
indexing the destination buffer as integers (4 bytes), instead of
indexing it as u8.

Changing the destination buffer type to u8 fixes both problems.

Signed-off-by: Hugo Villeneuve 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20220208162908.3182581-1-hugo@hugovil.com

rtc: pcf2127: use IRQ flags obtained from device tree if available

2022-02-15T22:28:32+00:00

If the interrupt pin of the PCF2127 is routed to the input of a GPIO
expander using the pca953x driver, the later will only accept an IRQ
of type IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_RISING, and the IRQ
request will fail.

Therefore, allow the IRQ type to be passed from the device tree data
if available.

Signed-off-by: Hugo Villeneuve 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20220117225742.1252362-1-hugo@hugovil.com

rtc: pcf2127: Fix typo in comment

2022-01-05T00:02:00+00:00

Replace TFS2 with TSF2.

Signed-off-by: Hugo Villeneuve 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20211207215626.2619819-1-hugo@hugovil.com

rtc: pcf2127: handle timestamp interrupts

2021-07-10T00:58:31+00:00

commit 03623b4b041c ("rtc: pcf2127: add tamper detection support")
added support for timestamp interrupts. However they are not being
handled in the irq handler. If a timestamp interrupt occurs it
results in kernel disabling the interrupt and displaying the call
trace:

[  121.145580] irq 78: nobody cared (try booting with the "irqpoll" option)
...
[  121.238087] [<00000000c4d69393>] irq_default_primary_handler threaded [<000000000a90d25b>] pcf2127_rtc_irq [rtc_pcf2127]
[  121.248971] Disabling IRQ #78

Handle timestamp interrupts in pcf2127_rtc_irq(). Save time stamp
before clearing TSF1 and TSF2 flags so that it can't be overwritten.
Set a flag to mark if the timestamp is valid and only report to sysfs
if the flag is set. To mimic the hardware behavior, don’t save
another timestamp until the first one has been read by the userspace.

However, if the alarm irq is not configured, keep the old way of
handling timestamp interrupt in the timestamp0 sysfs calls.

Signed-off-by: Mian Yousaf Kaukab 
Reviewed-by: Bruno Thomsen 
Tested-by: Bruno Thomsen 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20210629150643.31551-1-ykaukab@suse.de

rtc: pcf2127: Fix the datasheet URL

2021-06-20T21:48:35+00:00

The current datasheet URL is no longer valid.

Replace with a valid one.

Signed-off-by: Fabio Estevam 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20210603143447.2223353-1-festevam@gmail.com

rtc: pcf2127: properly set flag WD_CD for rtc chips(pcf2129, pca2129)

2021-02-13T21:38:13+00:00

Properly set flag WD_CD for rtc chips(pcf2129, pca2129)

Signed-off-by: Biwen Li 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20201202031840.15582-1-biwen.li@oss.nxp.com

rtc: pcf2127: Run a OTP refresh if not done before

2021-01-25T23:27:06+00:00

The datasheet of the PCF2127 states, it is recommended to process an OTP
refresh once the power is up and the oscillator is operating stable. The
OTP refresh takes less than 100 ms to complete.

Signed-off-by: Philipp Rosenberger 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20210118085752.5759-3-p.rosenberger@kunbus.com

rtc: pcf2127: Disable Power-On Reset Override

2021-01-25T23:26:16+00:00

To resume normal operation after a total power loss (no or empty
battery) the "Power-On Reset Override (PORO)" facility needs to be
disabled.

The register reset value sets the PORO enabled and the data sheet
recommends setting it to disabled for normal operation.

From what I've seen on the PCF2127 and PCF2129 there is no event
generated at the interrupt pin (INT), as long the PORO bit is set. This
behavior is not documented in the manual.

Signed-off-by: Philipp Rosenberger 
Signed-off-by: Alexandre Belloni 
Link: https://lore.kernel.org/r/20210118085752.5759-2-p.rosenberger@kunbus.com