linux.git/drivers/staging/clocking-wizard/Makefile, branch v5.10.258 Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git staging: add missing SPDX lines to Makefile files 2019-04-03T09:10:15+00:00 Greg Kroah-Hartman gregkh@linuxfoundation.org 2019-04-02T10:31:49+00:00 97ed8eab2a0067bee21aa634c938454660e76a38 There are a few remaining drivers/staging/*/Makefile files that do not have SPDX identifiers in them. Add the correct GPL-2.0 identifier to them to make scanning tools happy. Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
There are a few remaining drivers/staging/*/Makefile files that do not
have SPDX identifiers in them.  Add the correct GPL-2.0 identifier to
them to make scanning tools happy.

Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
staging: Add Xilinx Clocking Wizard driver 2014-10-20T02:29:26+00:00 Soren Brinkmann soren.brinkmann@xilinx.com 2014-10-02T16:13:35+00:00 812283cd54637633c1b5aa8d86667afe6c507f0e Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard provides an AXI interface to dynamically reconfigure the clocking resources of Xilinx FPGAs. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 
Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard
provides an AXI interface to dynamically reconfigure the clocking
resources of Xilinx FPGAs.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>