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<title>linux.git/include/asm-i386, branch v2.6.21.7</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>[PATCH] Proper fix for highmem kmap_atomic functions for VMI for 2.6.21</title>
<updated>2007-04-09T02:47:55+00:00</updated>
<author>
<name>Zachary Amsden</name>
<email>zach@vmware.com</email>
</author>
<published>2007-04-08T23:04:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=49f19710512c825aaea73b9207b3a848027cda1d'/>
<id>49f19710512c825aaea73b9207b3a848027cda1d</id>
<content type='text'>
Since lazy MMU batching mode still allows interrupts to enter, it is
possible for interrupt handlers to try to use kmap_atomic, which fails when
lazy mode is active, since the PTE update to highmem will be delayed.  The
best workaround is to issue an explicit flush in kmap_atomic_functions
case; this is the only way nested PTE updates can happen in the interrupt
handler.

Thanks to Jeremy Fitzhardinge for noting the bug and suggestions on a fix.

This patch gets reverted again when we start 2.6.22 and the bug gets fixed
differently.

Signed-off-by: Zachary Amsden &lt;zach@vmware.com&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Cc: Jeremy Fitzhardinge &lt;jeremy@goop.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
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<pre>
Since lazy MMU batching mode still allows interrupts to enter, it is
possible for interrupt handlers to try to use kmap_atomic, which fails when
lazy mode is active, since the PTE update to highmem will be delayed.  The
best workaround is to issue an explicit flush in kmap_atomic_functions
case; this is the only way nested PTE updates can happen in the interrupt
handler.

Thanks to Jeremy Fitzhardinge for noting the bug and suggestions on a fix.

This patch gets reverted again when we start 2.6.22 and the bug gets fixed
differently.

Signed-off-by: Zachary Amsden &lt;zach@vmware.com&gt;
Cc: Andi Kleen &lt;ak@muc.de&gt;
Cc: Jeremy Fitzhardinge &lt;jeremy@goop.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] x86-64: Disable local APIC timer use on AMD systems with C1E</title>
<updated>2007-04-02T10:14:12+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@suse.de</email>
</author>
<published>2007-04-02T10:14:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=3556ddfa9284a86a59a9b78fe5894430f6ab4eef'/>
<id>3556ddfa9284a86a59a9b78fe5894430f6ab4eef</id>
<content type='text'>
AMD dual core laptops with C1E do not run the APIC timer correctly
when they go idle. Previously the code assumed this only happened
on C2 or deeper.  But not all of these systems report support C2.

Use a AMD supplied snippet to detect C1E being enabled and then disable
local apic timer use.

This supercedes an earlier workaround using DMI detection of specific systems.

Thanks to Mark Langsdorf for the detection snippet.

Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</content>
<content type='xhtml'>
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<pre>
AMD dual core laptops with C1E do not run the APIC timer correctly
when they go idle. Previously the code assumed this only happened
on C2 or deeper.  But not all of these systems report support C2.

Use a AMD supplied snippet to detect C1E being enabled and then disable
local apic timer use.

This supercedes an earlier workaround using DMI detection of specific systems.

Thanks to Mark Langsdorf for the detection snippet.

Signed-off-by: Andi Kleen &lt;ak@suse.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] tty: minor merge correction</title>
<updated>2007-03-27T16:05:15+00:00</updated>
<author>
<name>Alan Cox</name>
<email>alan@lxorguk.ukuu.org.uk</email>
</author>
<published>2007-03-27T05:32:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=62b3e920ed7612f318126f9c9b37c6a8dcd4199e'/>
<id>62b3e920ed7612f318126f9c9b37c6a8dcd4199e</id>
<content type='text'>
Its now used.. because we added the new definitions so enabled all the
goodies on i386

Signed-off-by: Alan Cox &lt;alan@redhat.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Its now used.. because we added the new definitions so enabled all the
goodies on i386

Signed-off-by: Alan Cox &lt;alan@redhat.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: clear segment register padding in core dumps</title>
<updated>2007-03-23T22:32:58+00:00</updated>
<author>
<name>Roland McGrath</name>
<email>roland@redhat.com</email>
</author>
<published>2007-03-23T21:26:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=6ea65ff79ceb36a1195761be857da1fdf9878450'/>
<id>6ea65ff79ceb36a1195761be857da1fdf9878450</id>
<content type='text'>
The segment register slots in struct pt_regs are padded to 32 bits.
Some of these are stored with instructions like "pushl %es", which
leaves the high 16 bits as they were.  So the high bits of these
fields in struct pt_regs contain kernel stack garbage.  These bits are
ignored by everything and never leak to user space, except in core
dumps.  The user struct pt_regs is always at the base of the thread's
kernel stack and so it seems unlikely the information that leaks from
here is ever worthwhile so as to be a security concern, but I'm not
sure about that.  It has been this way for ages; userland consumers of
core dumps all mask off these high bits themselves.  So it is not urgent.

This change masks off the padding bits of the segment register slots
in core dumps.  ptrace already masks off these high bits, so this
makes the values in core dumps consistent with what ptrace would
report just before the process died.

As I read the processor manuals, the cs and ss values will always be
padded with zero bits rather than stack garbage.  But unlike "pushl %es",
this is not simple to test with a userland program.  So I added the two
instructions rather than wonder if they are really never necessary.

I think that x86_64 does not have this problem (for either 32-bit or
64-bit processes).  It only uses "mov" instructions from segment
registers, which zero-extend.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The segment register slots in struct pt_regs are padded to 32 bits.
Some of these are stored with instructions like "pushl %es", which
leaves the high 16 bits as they were.  So the high bits of these
fields in struct pt_regs contain kernel stack garbage.  These bits are
ignored by everything and never leak to user space, except in core
dumps.  The user struct pt_regs is always at the base of the thread's
kernel stack and so it seems unlikely the information that leaks from
here is ever worthwhile so as to be a security concern, but I'm not
sure about that.  It has been this way for ages; userland consumers of
core dumps all mask off these high bits themselves.  So it is not urgent.

This change masks off the padding bits of the segment register slots
in core dumps.  ptrace already masks off these high bits, so this
makes the values in core dumps consistent with what ptrace would
report just before the process died.

As I read the processor manuals, the cs and ss values will always be
padded with zero bits rather than stack garbage.  But unlike "pushl %es",
this is not simple to test with a userland program.  So I added the two
instructions rather than wonder if they are really never necessary.

I think that x86_64 does not have this problem (for either 32-bit or
64-bit processes).  It only uses "mov" instructions from segment
registers, which zero-extend.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: add command line option "local_apic_timer_c2_ok"</title>
<updated>2007-03-23T17:21:02+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2007-03-23T15:08:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=e585bef815c0315f2730d7bb4e15b82602454efd'/>
<id>e585bef815c0315f2730d7bb4e15b82602454efd</id>
<content type='text'>
It turned out that it is almost impossible to trust ACPI, BIOS &amp; Co.
regarding the C states. This was the reason to switch the local apic
timer off in C2 state already. OTOH there are sane and well behaving
systems, which get punished by that decision.

Allow the user to confirm that the local apic timer is trustworthy in C2
state. This keeps the default behaviour on the safe side.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It turned out that it is almost impossible to trust ACPI, BIOS &amp; Co.
regarding the C states. This was the reason to switch the local apic
timer off in C2 state already. OTOH there are sane and well behaving
systems, which get punished by that decision.

Allow the user to confirm that the local apic timer is trustworthy in C2
state. This keeps the default behaviour on the safe side.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: fix typo in sync_constant_test_bit()'s name</title>
<updated>2007-03-17T02:25:07+00:00</updated>
<author>
<name>Jeremy Fitzhardinge</name>
<email>jeremy@goop.org</email>
</author>
<published>2007-03-16T21:38:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=014efb1df74fe5a30bb10102404428fd4229726e'/>
<id>014efb1df74fe5a30bb10102404428fd4229726e</id>
<content type='text'>
Fix typo in sync_constant_test_bit()'s name, so sync_bitops.h is consistent
with bitops.h

Signed-off-by: Jeremy Fitzhardinge &lt;jeremy@xensource.com&gt;
Signed-off-by: Chris Wright &lt;chrisw@sous-sol.org&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix typo in sync_constant_test_bit()'s name, so sync_bitops.h is consistent
with bitops.h

Signed-off-by: Jeremy Fitzhardinge &lt;jeremy@xensource.com&gt;
Signed-off-by: Chris Wright &lt;chrisw@sous-sol.org&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Disable NMI watchdog by default properly</title>
<updated>2007-03-15T00:53:43+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@woody.linux-foundation.org</email>
</author>
<published>2007-03-15T00:50:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8ce5e3e45e01ffab38a9f03900181132b9068543'/>
<id>8ce5e3e45e01ffab38a9f03900181132b9068543</id>
<content type='text'>
This reverts commit 6ebf622b2577c50b1f496bd6a5e8739e55ae7b1c and
replaces it with one that actually works.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This reverts commit 6ebf622b2577c50b1f496bd6a5e8739e55ae7b1c and
replaces it with one that actually works.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] fastcall still doesn't make sense in paravirt</title>
<updated>2007-03-14T22:27:49+00:00</updated>
<author>
<name>Al Viro</name>
<email>viro@ftp.linux.org.uk</email>
</author>
<published>2007-03-14T09:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=192cd59bd93a97fd7d46f13fa07dbe328ff33257'/>
<id>192cd59bd93a97fd7d46f13fa07dbe328ff33257</id>
<content type='text'>
Andi had removed a bunch of those, but one more had creeped in...

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
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<pre>
Andi had removed a bunch of those, but one more had creeped in...

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] Fix vmi time header bug</title>
<updated>2007-03-12T23:36:16+00:00</updated>
<author>
<name>Zachary Amsden</name>
<email>zach@vmware.com</email>
</author>
<published>2007-03-12T22:58:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2cb8a57b9851805883dfe92cf5d88a726134a384'/>
<id>2cb8a57b9851805883dfe92cf5d88a726134a384</id>
<content type='text'>
Some gcc put this function in .init.text because the header didn't
match.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some gcc put this function in .init.text because the header didn't
match.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] i386: make x86_64 tsc header require i386 rather than vice-versa</title>
<updated>2007-03-06T17:30:24+00:00</updated>
<author>
<name>Andres Salomon</name>
<email>dilinger@debian.org</email>
</author>
<published>2007-03-06T09:42:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2272b0e03ea5731aca058eaf79c9955b36f0c083'/>
<id>2272b0e03ea5731aca058eaf79c9955b36f0c083</id>
<content type='text'>
Prior to commit 95492e4646e5de8b43d9a7908d6177fb737b61f0 ([PATCH] x86:
rewrite SMP TSC sync code), the headers in asm-i386 did not really require
anything in include/asm-x86_64.  This means that distributions such as
fedora did not include asm-x86_64 in kernel-devel headers for i386.  Ingo's
commit changed that, and broke things.  This is easy enough to hack around
in package builds by just including asm-x86_64 on i386, but that's kind of
annoying.  If anything, x86_64 should depend upon i386, not the other way
around.

This patch changes it so that asm-x86_64/tsc.h includes asm-i386/tsc.h,
rather than vice-versa.

Signed-off-by: Andres Salomon &lt;dilinger@debian.org&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Prior to commit 95492e4646e5de8b43d9a7908d6177fb737b61f0 ([PATCH] x86:
rewrite SMP TSC sync code), the headers in asm-i386 did not really require
anything in include/asm-x86_64.  This means that distributions such as
fedora did not include asm-x86_64 in kernel-devel headers for i386.  Ingo's
commit changed that, and broke things.  This is easy enough to hack around
in package builds by just including asm-x86_64 on i386, but that's kind of
annoying.  If anything, x86_64 should depend upon i386, not the other way
around.

This patch changes it so that asm-x86_64/tsc.h includes asm-i386/tsc.h,
rather than vice-versa.

Signed-off-by: Andres Salomon &lt;dilinger@debian.org&gt;
Acked-by: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Andi Kleen &lt;ak@suse.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
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