<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/asm-ia64, branch v2.6.26-rc7</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>[IA64] Fix CONFIG_IA64_SGI_UV build error</title>
<updated>2008-06-16T16:02:03+00:00</updated>
<author>
<name>Jack Steiner</name>
<email>steiner@sgi.com</email>
</author>
<published>2008-06-14T12:57:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=732a675a6303156d1a197dc780b0712bd4b49d46'/>
<id>732a675a6303156d1a197dc780b0712bd4b49d46</id>
<content type='text'>
Fix build error in CONFIG_IA64_SGI_UV config. (GENERIC builds
are ok).

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix build error in CONFIG_IA64_SGI_UV config. (GENERIC builds
are ok).

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] Workaround for RSE issue</title>
<updated>2008-05-27T20:24:39+00:00</updated>
<author>
<name>Tony Luck</name>
<email>tony.luck@intel.com</email>
</author>
<published>2008-05-27T20:23:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=4dcc29e1574d88f4465ba865ed82800032f76418'/>
<id>4dcc29e1574d88f4465ba865ed82800032f76418</id>
<content type='text'>
Problem: An application violating the architectural rules regarding
operation dependencies and having specific Register Stack Engine (RSE)
state at the time of the violation, may result in an illegal operation
fault and invalid RSE state.  Such faults may initiate a cascade of
repeated illegal operation faults within OS interruption handlers.
The specific behavior is OS dependent.

Implication: An application causing an illegal operation fault with
specific RSE state may result in a series of illegal operation faults
and an eventual OS stack overflow condition.

Workaround: OS interruption handlers that switch to kernel backing
store implement a check for invalid RSE state to avoid the series
of illegal operation faults.

The core of the workaround is the RSE_WORKAROUND code sequence
inserted into each invocation of the SAVE_MIN_WITH_COVER and
SAVE_MIN_WITH_COVER_R19 macros.  This sequence includes hard-coded
constants that depend on the number of stacked physical registers
being 96.  The rest of this patch consists of code to disable this
workaround should this not be the case (with the presumption that
if a future Itanium processor increases the number of registers, it
would also remove the need for this patch).

Move the start of the RBS up to a mod32 boundary to avoid some
corner cases.

The dispatch_illegal_op_fault code outgrew the spot it was
squatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING=y
Move it out to the end of the ivt.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Problem: An application violating the architectural rules regarding
operation dependencies and having specific Register Stack Engine (RSE)
state at the time of the violation, may result in an illegal operation
fault and invalid RSE state.  Such faults may initiate a cascade of
repeated illegal operation faults within OS interruption handlers.
The specific behavior is OS dependent.

Implication: An application causing an illegal operation fault with
specific RSE state may result in a series of illegal operation faults
and an eventual OS stack overflow condition.

Workaround: OS interruption handlers that switch to kernel backing
store implement a check for invalid RSE state to avoid the series
of illegal operation faults.

The core of the workaround is the RSE_WORKAROUND code sequence
inserted into each invocation of the SAVE_MIN_WITH_COVER and
SAVE_MIN_WITH_COVER_R19 macros.  This sequence includes hard-coded
constants that depend on the number of stacked physical registers
being 96.  The rest of this patch consists of code to disable this
workaround should this not be the case (with the presumption that
if a future Itanium processor increases the number of registers, it
would also remove the need for this patch).

Move the start of the RBS up to a mod32 boundary to avoid some
corner cases.

The dispatch_illegal_op_fault code outgrew the spot it was
squatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING=y
Move it out to the end of the ivt.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: ia64: Set KVM_IOAPIC_NUM_PINS to 48</title>
<updated>2008-05-18T11:34:16+00:00</updated>
<author>
<name>Xiantao Zhang</name>
<email>xiantao.zhang@intel.com</email>
</author>
<published>2008-05-14T11:44:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=bd25ed033af52c8c054d43a9cce9c5976266ae74'/>
<id>bd25ed033af52c8c054d43a9cce9c5976266ae74</id>
<content type='text'>
Guest's firmware needs an iosapic with 48 pins for ia64 guests.  Needed to
get networking going.

Signed-off-by: Xiantao Zhang &lt;xiantao.zhang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Guest's firmware needs an iosapic with 48 pins for ia64 guests.  Needed to
get networking going.

Signed-off-by: Xiantao Zhang &lt;xiantao.zhang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>KVM: ia64: Define new kvm_fpreg struture to replace ia64_fpreg</title>
<updated>2008-05-18T11:34:16+00:00</updated>
<author>
<name>Xiantao Zhang</name>
<email>xiantao.zhang@intel.com</email>
</author>
<published>2008-05-07T09:37:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=021f4b6cc966d02b2bcd68841bc2f0c4897edcbb'/>
<id>021f4b6cc966d02b2bcd68841bc2f0c4897edcbb</id>
<content type='text'>
The kernel's ia64_fpreg structure conflicts with userspace headers, so
define a new structure to replace it.

Signed-off-by: Xiantao Zhang &lt;xiantao.zhang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The kernel's ia64_fpreg structure conflicts with userspace headers, so
define a new structure to replace it.

Signed-off-by: Xiantao Zhang &lt;xiantao.zhang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] machvec support for SGI UV platform</title>
<updated>2008-05-14T21:22:04+00:00</updated>
<author>
<name>Jack Steiner</name>
<email>steiner@sgi.com</email>
</author>
<published>2008-05-06T20:18:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2224661494278bfc1c35b392cf6ee6f58e1d5e64'/>
<id>2224661494278bfc1c35b392cf6ee6f58e1d5e64</id>
<content type='text'>
This patch adds the basic IA64 machvec infrastructure to support
the SGI "UV" platform.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds the basic IA64 machvec infrastructure to support
the SGI "UV" platform.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] Add header files for SGI UV platform</title>
<updated>2008-05-14T21:20:25+00:00</updated>
<author>
<name>Jack Steiner</name>
<email>steiner@sgi.com</email>
</author>
<published>2008-05-06T20:18:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=7868f1ed84696d3cca83558e8dd459f20a36d077'/>
<id>7868f1ed84696d3cca83558e8dd459f20a36d077</id>
<content type='text'>
Add new UV-specific header files.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add new UV-specific header files.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ia64: types: use &lt;asm-generic/int-*.h&gt; for the ia64 architecture</title>
<updated>2008-05-02T23:18:21+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@zytor.com</email>
</author>
<published>2008-04-06T17:35:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=4a4bb4cee14905dd8b2b471b6998d62eeae8199c'/>
<id>4a4bb4cee14905dd8b2b471b6998d62eeae8199c</id>
<content type='text'>
This modifies &lt;asm-ia64/types.h&gt; to use the &lt;asm-generic/int-*.h&gt;
generic include files.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Acked-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This modifies &lt;asm-ia64/types.h&gt; to use the &lt;asm-generic/int-*.h&gt;
generic include files.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Acked-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6</title>
<updated>2008-05-02T15:17:58+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2008-05-02T15:17:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8bec4a5d9305c86d028a519b08f05b81cd63cc55'/>
<id>8bec4a5d9305c86d028a519b08f05b81cd63cc55</id>
<content type='text'>
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  [IA64] fix file and descriptor handling in perfmon
  [IA64] TS_RESTORE_SIGMASK
  [IA64] smp.c coding style fix
  [IA64] fix section mismatch in arch/ia64/kernel/topology.c
  [IA64] fix section mismatch in arch/ia64/kernel/palinfo.c
  [IA64] fix section mismatch in arch/ia64/kernel/irq.c
  [IA64] fix section mismatch in arch/ia64/kernel/acpi.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  [IA64] fix file and descriptor handling in perfmon
  [IA64] TS_RESTORE_SIGMASK
  [IA64] smp.c coding style fix
  [IA64] fix section mismatch in arch/ia64/kernel/topology.c
  [IA64] fix section mismatch in arch/ia64/kernel/palinfo.c
  [IA64] fix section mismatch in arch/ia64/kernel/irq.c
  [IA64] fix section mismatch in arch/ia64/kernel/acpi.c
</pre>
</div>
</content>
</entry>
<entry>
<title>[IA64] TS_RESTORE_SIGMASK</title>
<updated>2008-05-01T21:29:44+00:00</updated>
<author>
<name>Roland McGrath</name>
<email>roland@redhat.com</email>
</author>
<published>2008-04-30T21:40:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=848376c774a941c29e4fa083d96d84a5f2190857'/>
<id>848376c774a941c29e4fa083d96d84a5f2190857</id>
<content type='text'>
Replace TIF_RESTORE_SIGMASK with TS_RESTORE_SIGMASK and define
our own set_restore_sigmask() function.  This saves the costly
SMP-safe set_bit operation, which we do not need for the sigmask
flag since TIF_SIGPENDING always has to be set too.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Replace TIF_RESTORE_SIGMASK with TS_RESTORE_SIGMASK and define
our own set_restore_sigmask() function.  This saves the costly
SMP-safe set_bit operation, which we do not need for the sigmask
flag since TIF_SIGPENDING always has to be set too.

Signed-off-by: Roland McGrath &lt;roland@redhat.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dmi: clean-up dmi helper declarations</title>
<updated>2008-05-01T15:04:01+00:00</updated>
<author>
<name>Jean Delvare</name>
<email>khali@linux-fr.org</email>
</author>
<published>2008-05-01T11:35:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=ef3fb66ced1a890769d71a4f4ae9f68b8afa98b6'/>
<id>ef3fb66ced1a890769d71a4f4ae9f68b8afa98b6</id>
<content type='text'>
The declaration of dmi helper functions is a bit messy and inconsistent at the
moment:

* On ia64 they are declared in &lt;asm/io.h&gt;.
* On x86-64 they are declared in &lt;asm/dmi.h&gt;.
* On i386 they are declared both in &lt;asm/io.h&gt; and &lt;asm/dmi.h&gt;.

Fix the header files so that the dmi helper functions are consistently
defined in &lt;asm/dmi.h&gt;.

Signed-off-by: Jean Delvare &lt;khali@linux-fr.org&gt;
Cc: Matt Domsch &lt;Matt_Domsch@dell.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The declaration of dmi helper functions is a bit messy and inconsistent at the
moment:

* On ia64 they are declared in &lt;asm/io.h&gt;.
* On x86-64 they are declared in &lt;asm/dmi.h&gt;.
* On i386 they are declared both in &lt;asm/io.h&gt; and &lt;asm/dmi.h&gt;.

Fix the header files so that the dmi helper functions are consistently
defined in &lt;asm/dmi.h&gt;.

Signed-off-by: Jean Delvare &lt;khali@linux-fr.org&gt;
Cc: Matt Domsch &lt;Matt_Domsch@dell.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
