linux.git/include/asm-sh/cpu-sh2, branch master

sh: migrate to arch/sh/include/

2008-07-28T23:09:44+00:00

This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac.

Most of the moving about was done with Sam's directions at:

http://marc.info/?l=linux-sh&m=121724823706062&w=2

with subsequent hacking and fixups entirely my fault.

Signed-off-by: Sam Ravnborg 
Signed-off-by: Paul Mundt

rtc: rtc-sh: Split out the CPU defs to asm/cpu/.

2008-01-28T04:18:58+00:00

With all of the different CPU types this was getting a but unwieldly.
Since sh64 is now integrated, we don't have to worry about multiple
architectures caring about the header definitions.

Split out the defs for each asm/cpu/ to make rtc-sh slightly less
visually offensive.

Signed-off-by: Paul Mundt

sh: CCR1->CCR renaming for SH-2 parts.

2008-01-28T04:18:58+00:00

Avoid namespace collision with a CCR1 definition. The general
SH code always expects CCR anyways, so there's no point in keeping
the CCR1 naming around.

Fixes up synclink collisions:

drivers/char/pcmcia/synclink_cs.c:283:1: warning: "CCR1" redefined
In file included from include/asm/cache.h:13,
                 from include/asm/processor_32.h:15,
                 from include/asm/processor.h:60,
                 from include/linux/prefetch.h:14,
                 from include/linux/list.h:8,
                 from include/linux/module.h:9,
                 from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:21:1: warning: this is the location of the previous definition

Reported-by: Andrew Morton 
Signed-off-by: Paul Mundt

sh: Split out cache status bits per-CPU family.

2008-01-28T04:18:38+00:00

Signed-off-by: Paul Mundt

sh: Split out PXSEG segmentation per-CPU family.

2008-01-28T04:18:38+00:00

The CPU family abstraction already exists, so move out the PXSEG
definition for each one. SH-2A already has this special cased,
and SH-5 will as well.

Signed-off-by: Paul Mundt

sh: Kill off dead SH7604 support.

2007-06-08T02:55:28+00:00

This was added during 2.5.x, but was never moved along. This
can easily be resurrected if someone has one they wish to work
with, but it's not worth keeping around in its current form.

Signed-off-by: Paul Mundt

[PATCH] Optimize D-cache alias handling on fork

2006-12-13T17:27:08+00:00

Virtually index, physically tagged cache architectures can get away
without cache flushing when forking.  This patch adds a new cache
flushing function flush_cache_dup_mm(struct mm_struct *) which for the
moment I've implemented to do the same thing on all architectures
except on MIPS where it's a no-op.

Signed-off-by: Ralf Baechle 
Signed-off-by: Linus Torvalds

sh: Drop CPU subtype IRQ headers.

2006-12-06T01:45:37+00:00

This drops the various IRQ headers that were floating around
and primarily providing hardcoded IRQ definitions for the
various CPU subtypes. This quickly got to be an unmaintainable
mess, made even more evident by the subtle breakage introduced
by the SH-2 and SH-2A changes.

Now that subtypes are able to register IRQ maps directly, just
rip all of the headers out.

Signed-off-by: Paul Mundt

sh: SE7206 build fixes.

2006-12-06T01:45:37+00:00

A number of API changes happened underneath the 7206 patches, update
for everything that broke.

Signed-off-by: Paul Mundt

sh: Add SH-2A platform headers.

2006-12-06T01:45:36+00:00

Mostly SH-2 wrappers..

Signed-off-by: Yoshinori Sato 
Signed-off-by: Paul Mundt