<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/include/ras, branch v4.13.13</title>
<subtitle>Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</subtitle>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/'/>
<entry>
<title>trace, ras: add ARM processor error trace event</title>
<updated>2017-06-22T17:22:05+00:00</updated>
<author>
<name>Tyler Baicar</name>
<email>tbaicar@codeaurora.org</email>
</author>
<published>2017-06-21T18:17:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=e9279e83ad1f4b5af541a522a81888f828210b40'/>
<id>e9279e83ad1f4b5af541a522a81888f828210b40</id>
<content type='text'>
Currently there are trace events for the various RAS
errors with the exception of ARM processor type errors.
Add a new trace event for such errors so that the user
will know when they occur. These trace events are
consistent with the ARM processor error section type
defined in UEFI 2.6 spec section N.2.4.4.

Signed-off-by: Tyler Baicar &lt;tbaicar@codeaurora.org&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Reviewed-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently there are trace events for the various RAS
errors with the exception of ARM processor type errors.
Add a new trace event for such errors so that the user
will know when they occur. These trace events are
consistent with the ARM processor error section type
defined in UEFI 2.6 spec section N.2.4.4.

Signed-off-by: Tyler Baicar &lt;tbaicar@codeaurora.org&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Reviewed-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ras: acpi / apei: generate trace event for unrecognized CPER section</title>
<updated>2017-06-22T17:22:04+00:00</updated>
<author>
<name>Tyler Baicar</name>
<email>tbaicar@codeaurora.org</email>
</author>
<published>2017-06-21T18:17:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=297b64c74385fc7ea5dfff66105ab6465f2df49a'/>
<id>297b64c74385fc7ea5dfff66105ab6465f2df49a</id>
<content type='text'>
The UEFI spec includes non-standard section type support in the
Common Platform Error Record. This is defined in section N.2.3 of
UEFI version 2.5.

Currently if the CPER section's type (UUID) does not match any
section type that the kernel knows how to parse, a trace event is
not generated.

Generate a trace event which contains the raw error data for
non-standard section type error records.

Signed-off-by: Tyler Baicar &lt;tbaicar@codeaurora.org&gt;
CC: Jonathan (Zhixiong) Zhang &lt;zjzhang@codeaurora.org&gt;
Tested-by: Shiju Jose &lt;shiju.jose@huawei.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The UEFI spec includes non-standard section type support in the
Common Platform Error Record. This is defined in section N.2.3 of
UEFI version 2.5.

Currently if the CPER section's type (UUID) does not match any
section type that the kernel knows how to parse, a trace event is
not generated.

Generate a trace event which contains the raw error data for
non-standard section type error records.

Signed-off-by: Tyler Baicar &lt;tbaicar@codeaurora.org&gt;
CC: Jonathan (Zhixiong) Zhang &lt;zjzhang@codeaurora.org&gt;
Tested-by: Shiju Jose &lt;shiju.jose@huawei.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tracing, RAS: Cleanup on __get_str() usage</title>
<updated>2016-07-15T19:51:16+00:00</updated>
<author>
<name>Daniel Bristot de Oliveira</name>
<email>bristot@redhat.com</email>
</author>
<published>2016-07-01T23:44:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=a17167ce1110e576f7032b98deeb6ec800f39c7a'/>
<id>a17167ce1110e576f7032b98deeb6ec800f39c7a</id>
<content type='text'>
__get_str(msg) does not need (char *) operator overloading to access
mgs's elements anymore. This patch substitutes
((char *)__get_str(msg))[0] usage to __get_str(msg)[0].

It is just a code cleanup, no changes on tracepoint ABI.

Link: http://lkml.kernel.org/r/6f2db5be7705da2cb483923320c91283d7c712a7.1467407618.git.bristot@redhat.com

Cc: Trond Myklebust &lt;trond.myklebust@primarydata.com&gt;
Cc: Anna Schumaker &lt;anna.schumaker@netapp.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Reviewed-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Signed-off-by: Daniel Bristot de Oliveira &lt;bristot@redhat.com&gt;
Signed-off-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
__get_str(msg) does not need (char *) operator overloading to access
mgs's elements anymore. This patch substitutes
((char *)__get_str(msg))[0] usage to __get_str(msg)[0].

It is just a code cleanup, no changes on tracepoint ABI.

Link: http://lkml.kernel.org/r/6f2db5be7705da2cb483923320c91283d7c712a7.1467407618.git.bristot@redhat.com

Cc: Trond Myklebust &lt;trond.myklebust@primarydata.com&gt;
Cc: Anna Schumaker &lt;anna.schumaker@netapp.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Reviewed-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Signed-off-by: Daniel Bristot de Oliveira &lt;bristot@redhat.com&gt;
Signed-off-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tracing: add trace event for memory-failure</title>
<updated>2015-06-25T00:49:43+00:00</updated>
<author>
<name>Xie XiuQi</name>
<email>xiexiuqi@huawei.com</email>
</author>
<published>2015-06-24T23:57:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=97f0b13452198290799fd6780f05fbaa74f927d3'/>
<id>97f0b13452198290799fd6780f05fbaa74f927d3</id>
<content type='text'>
RAS user space tools like rasdaemon which base on trace event, could
receive mce error event, but no memory recovery result event.  So, I want
to add this event to make this scenario complete.

This patch add a event at ras group for memory-failure.

The output like below:
#  tracer: nop
#
#  entries-in-buffer/entries-written: 2/2   #P:24
#
#                               _-----=&gt; irqs-off
#                              / _----=&gt; need-resched
#                             | / _---=&gt; hardirq/softirq
#                             || / _--=&gt; preempt-depth
#                             ||| /     delay
#            TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#               | |       |   ||||       |         |
       mce-inject-13150 [001] ....   277.019359: memory_failure_event: pfn 0x19869: recovery action for free buddy page: Delayed

[xiexiuqi@huawei.com: fix build error]
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Reviewed-by: Naoya Horiguchi &lt;n-horiguchi@ah.jp.nec.com&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Chen Gong &lt;gong.chen@linux.intel.com&gt;
Cc: Jim Davis &lt;jim.epost@gmail.com&gt;
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
RAS user space tools like rasdaemon which base on trace event, could
receive mce error event, but no memory recovery result event.  So, I want
to add this event to make this scenario complete.

This patch add a event at ras group for memory-failure.

The output like below:
#  tracer: nop
#
#  entries-in-buffer/entries-written: 2/2   #P:24
#
#                               _-----=&gt; irqs-off
#                              / _----=&gt; need-resched
#                             | / _---=&gt; hardirq/softirq
#                             || / _--=&gt; preempt-depth
#                             ||| /     delay
#            TASK-PID   CPU#  ||||    TIMESTAMP  FUNCTION
#               | |       |   ||||       |         |
       mce-inject-13150 [001] ....   277.019359: memory_failure_event: pfn 0x19869: recovery action for free buddy page: Delayed

[xiexiuqi@huawei.com: fix build error]
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Reviewed-by: Naoya Horiguchi &lt;n-horiguchi@ah.jp.nec.com&gt;
Acked-by: Steven Rostedt &lt;rostedt@goodmis.org&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Chen Gong &lt;gong.chen@linux.intel.com&gt;
Cc: Jim Davis &lt;jim.epost@gmail.com&gt;
Signed-off-by: Xie XiuQi &lt;xiexiuqi@huawei.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>PCI/AER: Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND</title>
<updated>2014-09-25T15:42:40+00:00</updated>
<author>
<name>Chen, Gong</name>
<email>gong.chen@linux.intel.com</email>
</author>
<published>2014-08-13T06:22:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=846fc70986a65563a19ae86928c3acf34f12296d'/>
<id>846fc70986a65563a19ae86928c3acf34f12296d</id>
<content type='text'>
In PCIe r1.0, sec 5.10.2, bit 0 of the Uncorrectable Error Status, Mask,
and Severity Registers was for "Training Error." In PCIe r1.1, sec 7.10.2,
bit 0 was redefined to be "Undefined."

Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND to reflect this change.

No functional change.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In PCIe r1.0, sec 5.10.2, bit 0 of the Uncorrectable Error Status, Mask,
and Severity Registers was for "Training Error." In PCIe r1.1, sec 7.10.2,
bit 0 was redefined to be "Undefined."

Rename PCI_ERR_UNC_TRAIN to PCI_ERR_UNC_UND to reflect this change.

No functional change.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>trace, RAS: Add additional PCIe AER error strings</title>
<updated>2014-09-25T15:26:08+00:00</updated>
<author>
<name>Chen, Gong</name>
<email>gong.chen@linux.intel.com</email>
</author>
<published>2014-08-13T06:22:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=cb9a684acb3d79a5431ac78832148817debf3a06'/>
<id>cb9a684acb3d79a5431ac78832148817debf3a06</id>
<content type='text'>
Add all AER error bits defined in PCIe r3.0.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add all AER error bits defined in PCIe r3.0.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>trace, RAS: Replace bare numbers with #defines for PCIe AER error strings</title>
<updated>2014-09-25T15:07:41+00:00</updated>
<author>
<name>Chen, Gong</name>
<email>gong.chen@linux.intel.com</email>
</author>
<published>2014-08-13T06:22:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=99d440242c08c8a95576c0bc89278f8912f65bda'/>
<id>99d440242c08c8a95576c0bc89278f8912f65bda</id>
<content type='text'>
Replace bare numbers like "BIT(0)" with the existing #defines, e.g.,
PCI_ERR_COR_RCVR, to improve maintainability.  This way grep will find more
uses of the #defines.

No functional change.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Replace bare numbers like "BIT(0)" with the existing #defines, e.g.,
PCI_ERR_COR_RCVR, to improve maintainability.  This way grep will find more
uses of the #defines.

No functional change.

[bhelgaas: changelog]
Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</pre>
</div>
</content>
</entry>
<entry>
<title>trace, RAS: Add eMCA trace event interface</title>
<updated>2014-06-25T20:26:47+00:00</updated>
<author>
<name>Chen, Gong</name>
<email>gong.chen@linux.intel.com</email>
</author>
<published>2014-06-18T02:33:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=2dfb7d51a61d7ca91b131c8db612f27d9390f2d5'/>
<id>2dfb7d51a61d7ca91b131c8db612f27d9390f2d5</id>
<content type='text'>
Add trace interface to elaborate all H/W error related information.

Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add trace interface to elaborate all H/W error related information.

Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>trace, AER: Move trace into unified interface</title>
<updated>2014-06-23T17:12:29+00:00</updated>
<author>
<name>Chen, Gong</name>
<email>gong.chen@linux.intel.com</email>
</author>
<published>2014-06-11T20:57:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=0a2409aad38e97b1db55e6515b990be7b17060f6'/>
<id>0a2409aad38e97b1db55e6515b990be7b17060f6</id>
<content type='text'>
AER uses a separate trace interface by now. To make it
consistent, move it into unified RAS trace interface.

Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AER uses a separate trace interface by now. To make it
consistent, move it into unified RAS trace interface.

Signed-off-by: Chen, Gong &lt;gong.chen@linux.intel.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>edac: add support for error type "Info"</title>
<updated>2013-02-21T17:16:27+00:00</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab@redhat.com</email>
</author>
<published>2013-02-20T00:26:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.exis.tech/linux.git/commit/?id=8dd93d450bff251575c56b8f058393124e1f00fb'/>
<id>8dd93d450bff251575c56b8f058393124e1f00fb</id>
<content type='text'>
The CPER spec defines a forth type of error: informational
logs. Add support for it at the edac API and at the
trace event interface.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The CPER spec defines a forth type of error: informational
logs. Add support for it at the edac API and at the
trace event interface.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
