linux.git/kernel/hw_breakpoint.c, branch v2.6.35-rc4

hw_breakpoints: Fix percpu build failure

2010-05-04T06:39:36+00:00

Fix this build error:

   kernel/hw_breakpoint.c:58:1: error: pasting "__pcpu_scope_" and "*" does not give a valid preprocessing token

It happens if CONFIG_DEBUG_FORCE_WEAK_PER_CPU, because we concatenate
someting with the name and we have the "*" in the name.

Cc: Frederic Weisbecker 
Cc: Will Deacon 
Cc: Paul Mundt 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Jason Wessel 
LKML-Reference: <20100503133942.GA5497@nowhere>
Signed-off-by: Ingo Molnar

hw-breakpoints: Get the number of available registers on boot dynamically

2010-05-01T02:32:14+00:00

The breakpoint generic layer assumes that archs always know in advance
the static number of address registers available to host breakpoints
through the HBP_NUM macro.

However this is not true for every archs. For example Arm needs to get
this information dynamically to handle the compatiblity between
different versions.

To solve this, this patch proposes to drop the static HBP_NUM macro
and let the arch provide the number of available slots through a
new hw_breakpoint_slots() function. For archs that have
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS selected, it will be called once
as the number of registers fits for instruction and data breakpoints
together.
For the others it will be called first to get the number of
instruction breakpoint registers and another time to get the
data breakpoint registers, the targeted type is given as a
parameter of hw_breakpoint_slots().

Reported-by: Will Deacon 
Signed-off-by: Frederic Weisbecker 
Acked-by: Paul Mundt 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Jason Wessel 
Cc: Ingo Molnar

hw-breakpoints: Handle breakpoint weight in allocation constraints

2010-05-01T02:32:12+00:00

Depending on their nature and on what an arch supports, breakpoints
may consume more than one address register. For example a simple
absolute address match usually only requires one address register.
But an address range match may consume two registers.

Currently our slot allocation constraints, that tend to reflect the
limited arch's resources, always consider that a breakpoint consumes
one slot.

Then provide a way for archs to tell us the weight of a breakpoint
through a new hw_breakpoint_weight() helper. This weight will be
computed against the generic allocation constraints instead of
a constant value.

Signed-off-by: Frederic Weisbecker 
Acked-by: Paul Mundt 
Cc: Will Deacon 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Ingo Molnar

hw-breakpoints: Separate constraint space for data and instruction breakpoints

2010-05-01T02:32:11+00:00

There are two outstanding fashions for archs to implement hardware
breakpoints.

The first is to separate breakpoint address pattern definition
space between data and instruction breakpoints. We then have
typically distinct instruction address breakpoint registers
and data address breakpoint registers, delivered with
separate control registers for data and instruction breakpoints
as well. This is the case of PowerPc and ARM for example.

The second consists in having merged breakpoint address space
definition between data and instruction breakpoint. Address
registers can host either instruction or data address and
the access mode for the breakpoint is defined in a control
register. This is the case of x86 and Super H.

This patch adds a new CONFIG_HAVE_MIXED_BREAKPOINTS_REGS config
that archs can select if they belong to the second case. Those
will have their slot allocation merged for instructions and
data breakpoints.

The others will have a separate slot tracking between data and
instruction breakpoints.

Signed-off-by: Frederic Weisbecker 
Acked-by: Paul Mundt 
Cc: Will Deacon 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Ingo Molnar

hw-breakpoints: Change/Enforce some breakpoints policies

2010-05-01T02:32:10+00:00

The current policies of breakpoints in x86 and SH are the following:

- task bound breakpoints can only break on userspace addresses
- cpu wide breakpoints can only break on kernel addresses

The former rule prevents ptrace breakpoints to be set to trigger on
kernel addresses, which is good. But as a side effect, we can't
breakpoint on kernel addresses for task bound breakpoints.

The latter rule simply makes no sense, there is no reason why we
can't set breakpoints on userspace while performing cpu bound
profiles.

We want the following new policies:

- task bound breakpoint can set userspace address breakpoints, with
no particular privilege required.
- task bound breakpoints can set kernelspace address breakpoints but
must be privileged to do that.
- cpu bound breakpoints can do what they want as they are privileged
already.

To implement these new policies, this patch checks if we are dealing
with a kernel address breakpoint, if so and if the exclude_kernel
parameter is set, we tell the user that the breakpoint is invalid,
which makes a good generic ptrace protection.
If we don't have exclude_kernel, ensure the user has the right
privileges as kernel breakpoints are quite sensitive (risk of
trap recursion attacks and global performance impacts).

[ Paul Mundt: keep addr space check for sh signal delivery and fix
  double function declaration]

Signed-off-by: Frederic Weisbecker 
Cc: Will Deacon 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Paul Mundt 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Jason Wessel 
Cc: Ingo Molnar 
Signed-off-by: Paul Mundt

hw-breakpoints: Check disabled breakpoints again

2010-05-01T02:32:09+00:00

We stopped checking disabled breakpoints because we weren't
allowing breakpoints on NULL addresses. And gdb tends to set
NULL addresses on inactive breakpoints.

But refusing NULL addresses was actually a regression that has
been fixed now. There is no reason anymore to not validate
inactive breakpoint settings.

Signed-off-by: Frederic Weisbecker 
Acked-by: Paul Mundt 
Cc: Will Deacon 
Cc: Mahesh Salgaonkar 
Cc: K. Prasad 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Jason Wessel 
Cc: Ingo Molnar

Merge branch 'perf/core' into perf/urgent

2010-03-04T10:47:52+00:00

Merge reason: Switch from pre-merge topical split to the post-merge urgent track

Signed-off-by: Ingo Molnar

hw-breakpoints: Remove stub unthrottle callback

2010-02-28T19:51:15+00:00

We support event unthrottling in breakpoint events. It means
that if we have more than sysctl_perf_event_sample_rate/HZ,
perf will throttle, ignoring subsequent events until the next
tick.

So if ptrace exceeds this max rate, it will omit events, which
breaks the ptrace determinism that is supposed to report every
triggered breakpoints. This is likely to happen if we set
sysctl_perf_event_sample_rate to 1.

This patch removes support for unthrottling in breakpoint
events to break throttling and restore ptrace determinism.

Signed-off-by: Frederic Weisbecker 
Cc: 2.6.33.x 
Cc: Peter Zijlstra 
Cc: K.Prasad 
Cc: Paul Mackerras

percpu: Add __percpu sparse annotations to hw_breakpoint

2010-02-27T15:23:39+00:00

Add __percpu sparse annotations to hw_breakpoint.

These annotations are to make sparse consider percpu variables to be
in a different address space and warn if accessed without going
through percpu accessors.  This patch doesn't affect normal builds.

In kernel/hw_breakpoint.c, per_cpu(nr_task_bp_pinned, cpu)'s will
trigger spurious noderef related warnings from sparse.  Changing it to
&per_cpu(nr_task_bp_pinned[0], cpu) will work around the problem but
deemed to ugly by the maintainer.  Leave it alone until better
solution can be found.

Signed-off-by: Tejun Heo 
Cc: Stephen Rothwell 
Cc: K.Prasad 
LKML-Reference: <4B7B4B7A.9050902@kernel.org>
Signed-off-by: Frederic Weisbecker

perf: Make bp_len type to u64 generic across the arch

2010-02-04T00:07:12+00:00

Change 'bp_len' type to __u64 to make it work across archs as
the s390 architecture watch point length can be upto 2^64.

reference:
	http://lkml.org/lkml/2010/1/25/212

This is an ABI change that is not backward compatible with
the previous hardware breakpoint info layout integrated in this
development cycle, a rebuilt of perf tools is necessary for
versions based on 2.6.33-rc1 - 2.6.33-rc6 to work with a
kernel based on this patch.

Signed-off-by: Mahesh Salgaonkar 
Acked-by: Peter Zijlstra 
Cc: Ananth N Mavinakayanahalli 
Cc: "K. Prasad" 
Cc: Maneesh Soni 
Cc: Heiko Carstens 
Cc: Martin 
LKML-Reference: <20100130045518.GA20776@in.ibm.com>
Signed-off-by: Frederic Weisbecker