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| author | Tejas Upadhyay <tejas.upadhyay@intel.com> | 2024-10-23 20:38:13 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-11-08 16:31:04 +0100 |
| commit | 3e814d83528b63493b4c0e0f389bfe64c5b2b347 (patch) | |
| tree | 6823612980d8588d966668c2d2e6689fb401d002 | |
| parent | 39bccd3a04ca436e045bdbd59ef70e3d939a6bba (diff) | |
| download | linux-3e814d83528b63493b4c0e0f389bfe64c5b2b347.tar.gz linux-3e814d83528b63493b4c0e0f389bfe64c5b2b347.tar.bz2 linux-3e814d83528b63493b4c0e0f389bfe64c5b2b347.zip | |
drm/xe: Define STATELESS_COMPRESSION_CTRL as mcr register
commit 4551d60299b5ddc2655b6b365a4b92634e14e04f upstream.
Register STATELESS_COMPRESSION_CTRL should be considered
mcr register which should write to all slices as per
documentation.
Bspec: 71185
Fixes: ecabb5e6ce54 ("drm/xe/xe2: Add performance turning changes")
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Reviewed-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240814095614.909774-4-tejas.upadhyay@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index d6eddb672e88..df503cb4f2c5 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -80,7 +80,7 @@ #define LE_CACHEABILITY_MASK REG_GENMASK(1, 0) #define LE_CACHEABILITY(value) REG_FIELD_PREP(LE_CACHEABILITY_MASK, value) -#define STATELESS_COMPRESSION_CTRL XE_REG(0x4148) +#define STATELESS_COMPRESSION_CTRL XE_REG_MCR(0x4148) #define UNIFIED_COMPRESSION_FORMAT REG_GENMASK(3, 0) #define XE2_GAMREQSTRM_CTRL XE_REG(0x4194) |