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| author | Huacai Chen <chenhc@lemote.com> | 2017-03-16 21:00:25 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-04-12 12:42:08 +0200 |
| commit | a854a7975ce0556ff3eda32b2f6944b1ead96214 (patch) | |
| tree | 66f24c9c0e6a0aaf3f3029989c92922a610323e5 | |
| parent | 5dc6659242085b75b2a738231828558f9b39feb2 (diff) | |
| download | linux-a854a7975ce0556ff3eda32b2f6944b1ead96214.tar.gz linux-a854a7975ce0556ff3eda32b2f6944b1ead96214.tar.bz2 linux-a854a7975ce0556ff3eda32b2f6944b1ead96214.zip | |
MIPS: Add MIPS_CPU_FTLB for Loongson-3A R2
commit 033cffeedbd11c140952b98e8639bf652091a17d upstream.
Loongson-3A R2 and newer CPU have FTLB, but Config0.MT is 1, so add
MIPS_CPU_FTLB to the CPU options.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15752/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 07718bb5fc9d..12422fd4af23 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1824,7 +1824,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) } decode_configs(c); - c->options |= MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; + c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; c->writecombine = _CACHE_UNCACHED_ACCELERATED; break; default: |