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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-05 11:32:59 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-12-14 09:53:12 +0100 |
| commit | a967ab0f7338e84d379b7a764bf446221de21d3e (patch) | |
| tree | 36096a0207433a4215adf9a932ad84fb7abf0996 | |
| parent | cd11ce209d73cba69a5776818795446a7991755e (diff) | |
| download | linux-a967ab0f7338e84d379b7a764bf446221de21d3e.tar.gz linux-a967ab0f7338e84d379b7a764bf446221de21d3e.tar.bz2 linux-a967ab0f7338e84d379b7a764bf446221de21d3e.zip | |
clk: uniphier: fix DAPLL2 clock rate of Pro5
[ Upstream commit 67affb78a4e4feb837953e3434c8402a5c3b272f ]
The parent of DAPLL2 should be DAPLL1. Fix the clock connection.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/clk/uniphier/clk-uniphier-sys.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 07f3b91a7daf..d244e724e198 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -123,7 +123,7 @@ const struct uniphier_clk_data uniphier_sld8_sys_clk_data[] = { const struct uniphier_clk_data uniphier_pro5_sys_clk_data[] = { UNIPHIER_CLK_FACTOR("spll", -1, "ref", 120, 1), /* 2400 MHz */ UNIPHIER_CLK_FACTOR("dapll1", -1, "ref", 128, 1), /* 2560 MHz */ - UNIPHIER_CLK_FACTOR("dapll2", -1, "ref", 144, 125), /* 2949.12 MHz */ + UNIPHIER_CLK_FACTOR("dapll2", -1, "dapll1", 144, 125), /* 2949.12 MHz */ UNIPHIER_CLK_FACTOR("uart", 0, "dapll2", 1, 40), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 48), UNIPHIER_PRO5_SYS_CLK_NAND(2), |