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| author | Radim Krčmář <rkrcmar@ventanamicro.com> | 2025-07-25 18:54:10 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-09-09 18:56:34 +0200 |
| commit | 524ee2606a307c1bd86b3ad1b87655b699d0d92d (patch) | |
| tree | 87488bac17cfebadcc5bf04bc152ea8ff221ccfe | |
| parent | 522ffe298627cfe72539d72167c2e20e72b5e856 (diff) | |
| download | linux-524ee2606a307c1bd86b3ad1b87655b699d0d92d.tar.gz linux-524ee2606a307c1bd86b3ad1b87655b699d0d92d.tar.bz2 linux-524ee2606a307c1bd86b3ad1b87655b699d0d92d.zip | |
riscv: use lw when reading int cpu in asm_per_cpu
commit f4ea67a722e8c9e1fb8109adebb9fb881ff0793a upstream.
REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.
Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: stable@vger.kernel.org
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-5-rkrcmar@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/riscv/include/asm/asm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h index b5b84c6be01e..da818b39a24c 100644 --- a/arch/riscv/include/asm/asm.h +++ b/arch/riscv/include/asm/asm.h @@ -90,7 +90,7 @@ #endif .macro asm_per_cpu dst sym tmp - REG_L \tmp, TASK_TI_CPU_NUM(tp) + lw \tmp, TASK_TI_CPU_NUM(tp) slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT la \dst, __per_cpu_offset add \dst, \dst, \tmp |