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authorLinus Torvalds <torvalds@linux-foundation.org>2025-10-01 17:10:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2025-10-01 17:10:27 -0700
commita8253f807760e9c80eada9e5354e1240ccf325f9 (patch)
tree3a51c96cd7c4f9f8e4aa972d5068928680afa0f8 /Documentation/devicetree
parent9792d660a4e91d31a6b1af105ae3f1c29107e94b (diff)
parentfee2f45def0379ed140de4db8f998edb1d78e619 (diff)
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Merge tag 'soc-newsoc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new SoC support from Arnd Bergmann: "Pinkesh Vaghela adds support for the ESWIN EIC7700 SoC consisting of SiFive Quad-Core P550 CPU cluster and the first development board that uses it, the SiFive HiFive Premier P550 [1]. This adds initial device tree and also adds ESWIN architecture support. Boot-tested using intiramfs with Linux v6.17-rc3 on HiFive Premier P550 board using U-Boot 2024.01 and OpenSBI 1.4" Link: https://lore.kernel.org/linux-riscv/20250825132427.1618089-1-pinkesh.vaghela@einfochips.com/ [1] * tag 'soc-newsoc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: riscv: dts: eswin: add HiFive Premier P550 board device tree riscv: dts: add initial support for EIC7700 SoC dt-bindings: interrupt-controller: Add ESWIN EIC7700 PLIC dt-bindings: riscv: Add SiFive HiFive Premier P550 board riscv: Add Kconfig option for ESWIN platforms dt-bindings: riscv: Add SiFive P550 CPU compatible
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml1
-rw-r--r--Documentation/devicetree/bindings/riscv/cpus.yaml1
-rw-r--r--Documentation/devicetree/bindings/riscv/eswin.yaml29
3 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
index 5b827bc24301..f683d696909b 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
@@ -59,6 +59,7 @@ properties:
- items:
- enum:
- canaan,k210-plic
+ - eswin,eic7700-plic
- sifive,fu540-c000-plic
- spacemit,k1-plic
- starfive,jh7100-plic
diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 1a0cf0702a45..153d0dac57fb 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -52,6 +52,7 @@ properties:
- sifive,e5
- sifive,e7
- sifive,e71
+ - sifive,p550
- sifive,rocket0
- sifive,s7
- sifive,u5
diff --git a/Documentation/devicetree/bindings/riscv/eswin.yaml b/Documentation/devicetree/bindings/riscv/eswin.yaml
new file mode 100644
index 000000000000..c603c45eef22
--- /dev/null
+++ b/Documentation/devicetree/bindings/riscv/eswin.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/riscv/eswin.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ESWIN SoC-based boards
+
+maintainers:
+ - Min Lin <linmin@eswincomputing.com>
+ - Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
+ - Pritesh Patel <pritesh.patel@einfochips.com>
+
+description:
+ ESWIN SoC-based boards
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - sifive,hifive-premier-p550
+ - const: eswin,eic7700
+
+additionalProperties: true
+
+...