summaryrefslogtreecommitdiff
path: root/Documentation/devicetree
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2025-09-14 13:17:30 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2025-09-14 13:17:30 -0700
commit79e8447ec66289745d1b38679b16dd6c654ff578 (patch)
treee0df7d8a7205b0a944db7d5ad95a16b04ccda7db /Documentation/devicetree
parent0676181a87540fa2aabc8920dc30bca5071b8f1a (diff)
parent6cb8c1f957f674ca20b7d7c96b1f1bb11b83b679 (diff)
downloadlinux-79e8447ec66289745d1b38679b16dd6c654ff578.tar.gz
linux-79e8447ec66289745d1b38679b16dd6c654ff578.tar.bz2
linux-79e8447ec66289745d1b38679b16dd6c654ff578.zip
Merge tag 'phy-fix-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull generic phy driver fixes from Vinod Koul: - Qualcomm repeater override properties, qmp pcie bindings fix for clocks and initialization sequence for firmware power down case - Marvell comphy bindings clock and child node constraints - Tegra xusb device reference leaks fix - TI omap usb device ref leak on unbind and RGMII IS settings fix * tag 'phy-fix-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: qcom: qmp-pcie: Fix PHY initialization when powered down by firmware phy: ti: gmii-sel: Always write the RGMII ID setting dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings phy: ti-pipe3: fix device leak at unbind phy: ti: omap-usb2: fix device leak at unbind phy: tegra: xusb: fix device and OF node leak at probe dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraints phy: qualcomm: phy-qcom-eusb2-repeater: fix override properties
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml29
-rw-r--r--Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml4
2 files changed, 23 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml b/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
index d9501df42886..c35d31642805 100644
--- a/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
+++ b/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
@@ -47,21 +47,19 @@ properties:
const: 0
clocks:
+ minItems: 1
maxItems: 3
- description: Reference clocks for CP110; MG clock, MG Core clock, AXI clock
clock-names:
- items:
- - const: mg_clk
- - const: mg_core_clk
- - const: axi_clk
+ minItems: 1
+ maxItems: 3
marvell,system-controller:
description: Phandle to the Marvell system controller (CP110 only)
$ref: /schemas/types.yaml#/definitions/phandle
patternProperties:
- '^phy@[0-2]$':
+ '^phy@[0-5]$':
description: A COMPHY lane child node
type: object
additionalProperties: false
@@ -69,10 +67,14 @@ patternProperties:
properties:
reg:
description: COMPHY lane number
+ maximum: 5
'#phy-cells':
const: 1
+ connector:
+ type: object
+
required:
- reg
- '#phy-cells'
@@ -91,13 +93,24 @@ allOf:
then:
properties:
- clocks: false
- clock-names: false
+ clocks:
+ maxItems: 1
+ clock-names:
+ const: xtal
required:
- reg-names
else:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: mg_clk
+ - const: mg_core_clk
+ - const: axi_clk
+
required:
- marvell,system-controller
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index a1ae8c7988c8..b6f140bf5b3b 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -176,6 +176,8 @@ allOf:
compatible:
contains:
enum:
+ - qcom,sa8775p-qmp-gen4x2-pcie-phy
+ - qcom,sa8775p-qmp-gen4x4-pcie-phy
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
@@ -197,8 +199,6 @@ allOf:
contains:
enum:
- qcom,qcs8300-qmp-gen4x2-pcie-phy
- - qcom,sa8775p-qmp-gen4x2-pcie-phy
- - qcom,sa8775p-qmp-gen4x4-pcie-phy
then:
properties:
clocks: