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| author | Rob Herring (Arm) <robh@kernel.org> | 2024-07-31 10:51:21 -0600 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2024-08-16 13:09:12 +0100 |
| commit | f9b11aa00708d94a0cd78bfde34b68c0f95d8b50 (patch) | |
| tree | 3f76722ffe67abd99d39d55b63176dc4f0cd9894 /arch/arm64/include/asm/sysreg.h | |
| parent | 741ee5284551cf5daae95d9c8c1e34f47382ed3c (diff) | |
| download | linux-f9b11aa00708d94a0cd78bfde34b68c0f95d8b50.tar.gz linux-f9b11aa00708d94a0cd78bfde34b68c0f95d8b50.tar.bz2 linux-f9b11aa00708d94a0cd78bfde34b68c0f95d8b50.zip | |
KVM: arm64: pmu: Use generated define for PMSELR_EL0.SEL access
ARMV8_PMU_COUNTER_MASK is really a mask for the PMSELR_EL0.SEL register
field. Make that clear by adding a standard sysreg definition for the
register, and using it instead.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Tested-by: James Clark <james.clark@linaro.org>
Link: https://lore.kernel.org/r/20240731-arm-pmu-3-9-icntr-v3-4-280a8d7ff465@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 4a9ea103817e..00af1c331c1e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -403,7 +403,6 @@ #define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2) #define SYS_PMOVSCLR_EL0 sys_reg(3, 3, 9, 12, 3) #define SYS_PMSWINC_EL0 sys_reg(3, 3, 9, 12, 4) -#define SYS_PMSELR_EL0 sys_reg(3, 3, 9, 12, 5) #define SYS_PMCEID0_EL0 sys_reg(3, 3, 9, 12, 6) #define SYS_PMCEID1_EL0 sys_reg(3, 3, 9, 12, 7) #define SYS_PMCCNTR_EL0 sys_reg(3, 3, 9, 13, 0) |