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| author | Svyatoslav Ryhel <clamor95@gmail.com> | 2025-02-26 12:56:11 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-06-04 14:40:08 +0200 |
| commit | b649481a1c14f64c3bd52cd2cfe5a837ab6d7fc7 (patch) | |
| tree | 7f19a0154e4e354f212c7e85ba05e2cdaec3a53a /arch/arm | |
| parent | fd10aa99ef398f791399c3cd075caf292b4ccd3b (diff) | |
| download | linux-b649481a1c14f64c3bd52cd2cfe5a837ab6d7fc7.tar.gz linux-b649481a1c14f64c3bd52cd2cfe5a837ab6d7fc7.tar.bz2 linux-b649481a1c14f64c3bd52cd2cfe5a837ab6d7fc7.zip | |
ARM: tegra: Switch DSI-B clock parent to PLLD on Tegra114
[ Upstream commit 2b3db788f2f614b875b257cdb079adadedc060f3 ]
PLLD is usually used as parent clock for internal video devices, like
DSI for example, while PLLD2 is used as parent for HDMI.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250226105615.61087-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/tegra114.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 09996acad639..bb23bb39dd5b 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -139,7 +139,7 @@ reg = <0x54400000 0x00040000>; clocks = <&tegra_car TEGRA114_CLK_DSIB>, <&tegra_car TEGRA114_CLK_DSIBLP>, - <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>; + <&tegra_car TEGRA114_CLK_PLL_D_OUT0>; clock-names = "dsi", "lp", "parent"; resets = <&tegra_car 82>; reset-names = "dsi"; |