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authorLinus Torvalds <torvalds@linux-foundation.org>2024-11-29 10:36:01 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2024-11-29 10:36:01 -0800
commit63c81af15cf8e64045e8ec55991363ef569a267a (patch)
treedc7c136a756dd22e9934d8f1a355f0216202c157 /arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi
parent9d5daef3b3a67535825dcdf1bfe078fdbada5606 (diff)
parent4fbd66d8254cedfd1218393f39d83b6c07a01917 (diff)
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Merge tag 'mips_6.13_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer: - fix for loongson64 device tree - add SPI nand to realtek device tree - change clock tree for mobileye * tag 'mips_6.13_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Loongson64: DTS: Really fix PCIe port nodes for ls7a mips: dts: realtek: Add SPI NAND controller MIPS: mobileye: eyeq6h: add OLB nodes OLB and remove fixed clocks MIPS: mobileye: eyeq5: use OLB as provider for fixed factor clocks
Diffstat (limited to 'arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi')
-rw-r--r--arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi52
1 files changed, 0 insertions, 52 deletions
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi
deleted file mode 100644
index 5fa99e06fde7..000000000000
--- a/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi
+++ /dev/null
@@ -1,52 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Copyright 2023 Mobileye Vision Technologies Ltd.
- */
-
-#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
-
-/ {
- xtal: clock-30000000 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <30000000>;
- };
-
- pll_west: clock-2000000000-west {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <2000000000>;
- };
-
- pll_cpu: clock-2000000000-cpu {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <2000000000>;
- };
-
- /* pll-cpu derivatives */
- occ_cpu: clock-2000000000-occ-cpu {
- compatible = "fixed-factor-clock";
- clocks = <&pll_cpu>;
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <1>;
- };
-
- /* pll-west derivatives */
- occ_periph_w: clock-200000000 {
- compatible = "fixed-factor-clock";
- clocks = <&pll_west>;
- #clock-cells = <0>;
- clock-div = <10>;
- clock-mult = <1>;
- };
- uart_clk: clock-200000000-uart {
- compatible = "fixed-factor-clock";
- clocks = <&occ_periph_w>;
- #clock-cells = <0>;
- clock-div = <1>;
- clock-mult = <1>;
- };
-
-};