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| author | Miquel Sabaté Solà <mikisabate@gmail.com> | 2024-09-13 07:13:24 +0200 |
|---|---|---|
| committer | Alexandre Ghiti <alexghiti@rivosinc.com> | 2025-03-18 09:10:22 +0000 |
| commit | 4458b8f68dc7ab8309291f1667157d0250938291 (patch) | |
| tree | 17c8fae850cb6a2a836921601ff82b558cc87d90 /arch/riscv/include/uapi/asm | |
| parent | d3817d091fe6480de5bf3faba0fc2ce25f8d023e (diff) | |
| download | linux-4458b8f68dc7ab8309291f1667157d0250938291.tar.gz linux-4458b8f68dc7ab8309291f1667157d0250938291.tar.bz2 linux-4458b8f68dc7ab8309291f1667157d0250938291.zip | |
riscv: hwprobe: export Zicntr and Zihpm extensions
Export Zicntr and Zihpm ISA extensions through the hwprobe syscall.
[ alex: Fix hwprobe numbering ]
Signed-off-by: Miquel Sabaté Solà <mikisabate@gmail.com>
Acked-by: Jesse Taube <jesse@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240913051324.8176-1-mikisabate@gmail.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/uapi/asm')
| -rw-r--r-- | arch/riscv/include/uapi/asm/hwprobe.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index c3c1cc951cb9..8cac35cb19d8 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -73,6 +73,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 47) #define RISCV_HWPROBE_EXT_ZAWRS (1ULL << 48) #define RISCV_HWPROBE_EXT_SUPM (1ULL << 49) +#define RISCV_HWPROBE_EXT_ZICNTR (1ULL << 50) +#define RISCV_HWPROBE_EXT_ZIHPM (1ULL << 51) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) |