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| author | Michael Zhivich <mzhivich@akamai.com> | 2025-07-23 09:40:19 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-28 16:24:05 +0200 |
| commit | 6b80d98a971004703594f533e50ff75f8dec237a (patch) | |
| tree | fcde71bdc63776fdd583d4c39992527f5041b47b /arch | |
| parent | 6d40dd35a932a50ec97fa9a4b1375d9737492eda (diff) | |
| download | linux-6b80d98a971004703594f533e50ff75f8dec237a.tar.gz linux-6b80d98a971004703594f533e50ff75f8dec237a.tar.bz2 linux-6b80d98a971004703594f533e50ff75f8dec237a.zip | |
x86/bugs: Fix use of possibly uninit value in amd_check_tsa_microcode()
For kernels compiled with CONFIG_INIT_STACK_NONE=y, the value of __reserved
field in zen_patch_rev union on the stack may be garbage. If so, it will
prevent correct microcode check when consulting p.ucode_rev, resulting in
incorrect mitigation selection.
This is a stable-only fix.
Cc: <stable@vger.kernel.org>
Signed-off-by: Michael Zhivich <mzhivich@akamai.com>
Fixes: f2b75f1368af ("x86/bugs: Add a Transient Scheduler Attacks mitigation")
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kernel/cpu/amd.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 04ac18ff022f..3c7d64c454b3 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -592,6 +592,8 @@ static bool amd_check_tsa_microcode(void) p.model = c->x86_model; p.ext_model = c->x86_model >> 4; p.stepping = c->x86_stepping; + /* reserved bits are expected to be 0 in test below */ + p.__reserved = 0; if (c->x86 == 0x19) { switch (p.ucode_rev >> 8) { |
