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| author | Marc Ferland <ferlandm@amotus.ca> | 2020-11-04 12:30:04 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-12-02 08:49:48 +0100 |
| commit | d6b5dc5429f161fcef7da5a1c83c31927da65fcd (patch) | |
| tree | 1a49d44d69d88681b86c334340076d4ca7b9d2de /drivers/dma | |
| parent | 54b01ded1e926eed724428465696a54b52d07e5c (diff) | |
| download | linux-d6b5dc5429f161fcef7da5a1c83c31927da65fcd.tar.gz linux-d6b5dc5429f161fcef7da5a1c83c31927da65fcd.tar.bz2 linux-d6b5dc5429f161fcef7da5a1c83c31927da65fcd.zip | |
dmaengine: xilinx_dma: use readl_poll_timeout_atomic variant
[ Upstream commit 0ba2df09f1500d3f27398a3382b86d39c3e6abe2 ]
The xilinx_dma_poll_timeout macro is sometimes called while holding a
spinlock (see xilinx_dma_issue_pending() for an example) this means we
shouldn't sleep when polling the dma channel registers. To address it
in xilinx poll timeout macro use readl_poll_timeout_atomic instead of
readl_poll_timeout variant.
Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1604473206-32573-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/xilinx/xilinx_dma.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 43acba2a1c0e..a6abfe702c5a 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -454,8 +454,8 @@ struct xilinx_dma_device { #define to_dma_tx_descriptor(tx) \ container_of(tx, struct xilinx_dma_tx_descriptor, async_tx) #define xilinx_dma_poll_timeout(chan, reg, val, cond, delay_us, timeout_us) \ - readl_poll_timeout(chan->xdev->regs + chan->ctrl_offset + reg, val, \ - cond, delay_us, timeout_us) + readl_poll_timeout_atomic(chan->xdev->regs + chan->ctrl_offset + reg, \ + val, cond, delay_us, timeout_us) /* IO accessors */ static inline u32 dma_read(struct xilinx_dma_chan *chan, u32 reg) |