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authorLili Li <lili.li@intel.com>2025-11-24 21:15:37 +0800
committerTony Luck <tony.luck@intel.com>2025-12-19 13:39:14 -0800
commit4c36e6106997b6ad8f4a279b4bdbca3ed6f53c6c (patch)
tree2f58eeb1ad97afa9e340fc984c966671f1d46438 /drivers/edac
parent4b720906efa34e1f68e3b2f7061c294e1889525b (diff)
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EDAC/igen6: Add more Intel Panther Lake-H SoCs support
Add more Intel Panther Lake-H SoC compute die IDs for EDAC support. Signed-off-by: Lili Li <lili.li@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Link: https://patch.msgid.link/20251124131537.3633983-1-qiuxu.zhuo@intel.com
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/igen6_edac.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 717862dc4765..045c20179cd3 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -281,6 +281,16 @@ static struct work_struct ecclog_work;
#define DID_PTL_H_SKU1 0xb000
#define DID_PTL_H_SKU2 0xb001
#define DID_PTL_H_SKU3 0xb002
+#define DID_PTL_H_SKU4 0xb003
+#define DID_PTL_H_SKU5 0xb004
+#define DID_PTL_H_SKU6 0xb005
+#define DID_PTL_H_SKU7 0xb008
+#define DID_PTL_H_SKU8 0xb011
+#define DID_PTL_H_SKU9 0xb014
+#define DID_PTL_H_SKU10 0xb015
+#define DID_PTL_H_SKU11 0xb028
+#define DID_PTL_H_SKU12 0xb029
+#define DID_PTL_H_SKU13 0xb02a
/* Compute die IDs for Wildcat Lake with IBECC */
#define DID_WCL_SKU1 0xfd00
@@ -682,6 +692,16 @@ static struct pci_device_id igen6_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU1), (kernel_ulong_t)&mtl_p_cfg },
{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU2), (kernel_ulong_t)&mtl_p_cfg },
{ PCI_VDEVICE(INTEL, DID_PTL_H_SKU3), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU4), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU5), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU6), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU7), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU8), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU9), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU10), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU11), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU12), (kernel_ulong_t)&mtl_p_cfg },
+ { PCI_VDEVICE(INTEL, DID_PTL_H_SKU13), (kernel_ulong_t)&mtl_p_cfg },
{ PCI_VDEVICE(INTEL, DID_WCL_SKU1), (kernel_ulong_t)&wcl_cfg },
{ },
};