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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-04 12:05:32 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-04 12:05:32 -0700 |
commit | 2bd80401743568ced7d303b008ae5298ce77e695 (patch) | |
tree | d70278682fca619f7d842faa7c5a5bdce5016cfa /drivers/gpio/gpio-sodaville.c | |
parent | 99a7583de5ffd5cd82c407aad32bcbdeea09155b (diff) | |
parent | b86c86aa9805b25ee70071d084e618b2c40641b5 (diff) | |
download | linux-2bd80401743568ced7d303b008ae5298ce77e695.tar.gz linux-2bd80401743568ced7d303b008ae5298ce77e695.tar.bz2 linux-2bd80401743568ced7d303b008ae5298ce77e695.zip |
Merge tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.12 kernel cycle.
Core changes:
- Return NULL from gpiod_get_optional() when GPIOLIB is disabled.
This was a much discussed change. It affects use cases where people
write drivers that might or might not be using GPIO resources. I
have decided that this is the lesser evil right now.
- Make gpiod_count() behave consistently across different hardware
descriptions.
- Fix the syntax around open drain/open source to not infer active
high/low semantics.
New drivers:
- A new single-register fixed-direction framework driver for hardware
that have lines controlled by a single register that just work in
one direction (out or in), including IRQ support.
- Support the Fintek F71889A GPIO SuperIO controller.
- Support the National NI 169445 MMIO GPIO.
- Support for the X-Gene derivative of the DWC GPIO controller
- Support for the Rohm BD9571MWV-M PMIC GPIO controller.
- Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver
and replace both the Gemini and the Moxa ART custom drivers with
this driver.
Driver improvements:
- A whole slew of drivers have their spinlocks chaned to raw
spinlocks as they provide irqchips, and thus we are progressing on
realtime compliance.
- Use devm_irq_alloc_descs() in a slew of drivers, getting managed
resources.
- Support for the embedded PWM controller inside the MVEBU driver.
- Debounce, open source and open drain support for the Aspeed driver.
- Misc smaller fixes like spelling and syntax and whatnot"
* tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits)
gpio: f7188x: Add a missing break
gpio: omap: return error if requested debounce time is not possible
gpio: Add ROHM BD9571MWV-M PMIC GPIO driver
gpio: gpio-wcove: fix GPIO IRQ status mask
gpio: DT bindings, move tca9554 from pcf857x to pca953x
gpio: move tca9554 from pcf857x to pca953x
gpio: arizona: Correct check whether the pin is an input
gpio: Add XRA1403 DTS binding documentation
dt-bindings: add exar to vendor prefixes list
gpio: gpio-wcove: fix irq pending status bit width
gpio: dwapb: use dwapb_read instead of readl_relaxed
gpio: aspeed: Add open-source and open-drain support
gpio: aspeed: Add debounce support
gpio: aspeed: dt: Add optional clocks property
gpio: aspeed: dt: Fix description alignment in bindings document
gpio: mvebu: Add limited PWM support
gpio: Use unsigned int for interrupt numbers
gpio: f7188x: Add F71889A GPIO support.
gpio: core: Decouple open drain/source flag with active low/high
gpio: arizona: Correct handling for reading input GPIOs
...
Diffstat (limited to 'drivers/gpio/gpio-sodaville.c')
-rw-r--r-- | drivers/gpio/gpio-sodaville.c | 28 |
1 files changed, 11 insertions, 17 deletions
diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 7da9e6c4546a..f60da83349ef 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -135,7 +135,8 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, struct irq_chip_type *ct; int ret; - sd->irq_base = irq_alloc_descs(-1, 0, SDV_NUM_PUB_GPIOS, -1); + sd->irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, + SDV_NUM_PUB_GPIOS, -1); if (sd->irq_base < 0) return sd->irq_base; @@ -143,10 +144,11 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, writel(0, sd->gpio_pub_base + GPIO_INT); writel((1 << 11) - 1, sd->gpio_pub_base + GPSTR); - ret = request_irq(pdev->irq, sdv_gpio_pub_irq_handler, IRQF_SHARED, - "sdv_gpio", sd); + ret = devm_request_irq(&pdev->dev, pdev->irq, + sdv_gpio_pub_irq_handler, IRQF_SHARED, + "sdv_gpio", sd); if (ret) - goto out_free_desc; + return ret; /* * This gpio irq controller latches level irqs. Testing shows that if @@ -155,10 +157,8 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, */ sd->gc = irq_alloc_generic_chip("sdv-gpio", 1, sd->irq_base, sd->gpio_pub_base, handle_fasteoi_irq); - if (!sd->gc) { - ret = -ENOMEM; - goto out_free_irq; - } + if (!sd->gc) + return -ENOMEM; sd->gc->private = sd; ct = sd->gc->chip_types; @@ -176,16 +176,10 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS, sd->irq_base, 0, &irq_domain_sdv_ops, sd); - if (!sd->id) { - ret = -ENODEV; - goto out_free_irq; - } + if (!sd->id) + return -ENODEV; + return 0; -out_free_irq: - free_irq(pdev->irq, sd); -out_free_desc: - irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS); - return ret; } static int sdv_gpio_probe(struct pci_dev *pdev, |