diff options
| author | Mukul Joshi <mukul.joshi@amd.com> | 2021-05-18 10:58:09 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-05-19 22:44:19 -0400 |
| commit | 1f6256590c118475d7c32839cf07178d1ae97f0c (patch) | |
| tree | b98d10bbff334783d4651c8061a59518b4191a69 /drivers/gpu/drm/amd/include | |
| parent | 295c4f513f50602f09788e944b30761a20f9f239 (diff) | |
| download | linux-1f6256590c118475d7c32839cf07178d1ae97f0c.tar.gz linux-1f6256590c118475d7c32839cf07178d1ae97f0c.tar.bz2 linux-1f6256590c118475d7c32839cf07178d1ae97f0c.zip | |
drm/amdgpu: Query correct register for DF hashing on Aldebaran
For Aldebaran, driver needs to query DramMegaBaseAddress to
check if DF hashing is enabled.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h b/drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h index bb2c9c7a18df..bd37aa6b6560 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_offset.h @@ -33,6 +33,9 @@ #define mmDF_CS_UMC_AON0_DramBaseAddress0 0x0044 #define mmDF_CS_UMC_AON0_DramBaseAddress0_BASE_IDX 0 +#define mmDF_GCM_AON0_DramMegaBaseAddress0 0x0064 +#define mmDF_GCM_AON0_DramMegaBaseAddress0_BASE_IDX 0 + #define smnPerfMonCtlLo0 0x01d440UL #define smnPerfMonCtlHi0 0x01d444UL #define smnPerfMonCtlLo1 0x01d450UL |