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| author | Benjamin Gaignard <benjamin.gaignard@collabora.com> | 2026-01-08 14:29:46 +0100 |
|---|---|---|
| committer | Sasha Levin <sashal@kernel.org> | 2026-03-04 07:21:00 -0500 |
| commit | 9e3b9d2472b36ba80d985a7dab9764accf5de049 (patch) | |
| tree | db9ab8af3119d54d3045e5295bc5a0614f40e746 /drivers/media | |
| parent | 1af2853b4e97fd95262fdef311b2334337069bc9 (diff) | |
| download | linux-9e3b9d2472b36ba80d985a7dab9764accf5de049.tar.gz linux-9e3b9d2472b36ba80d985a7dab9764accf5de049.tar.bz2 linux-9e3b9d2472b36ba80d985a7dab9764accf5de049.zip | |
media: verisilicon: AV1: Set IDR flag for intra_only frame type
[ Upstream commit 1c1b79f40ee4444fa1ac96079751608b724c6b2b ]
Intra_only frame could be considered as a key frame so Instantaneous
Decoding Refresh (IDR) flag must be set of the both case and not only
for key frames.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Reported-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Fixes: 727a400686a2c ("media: verisilicon: Add Rockchip AV1 decoder")
Cc: stable@vger.kernel.org
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/media')
| -rw-r--r-- | drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c index f52b8208e6b9..500e94bcb029 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c @@ -2018,7 +2018,7 @@ static void rockchip_vpu981_av1_dec_set_parameters(struct hantro_ctx *ctx) !!(ctrls->frame->quantization.flags & V4L2_AV1_QUANTIZATION_FLAG_DELTA_Q_PRESENT)); - hantro_reg_write(vpu, &av1_idr_pic_e, !ctrls->frame->frame_type); + hantro_reg_write(vpu, &av1_idr_pic_e, IS_INTRA(ctrls->frame->frame_type)); hantro_reg_write(vpu, &av1_quant_base_qindex, ctrls->frame->quantization.base_q_idx); hantro_reg_write(vpu, &av1_bit_depth_y_minus8, ctx->bit_depth - 8); hantro_reg_write(vpu, &av1_bit_depth_c_minus8, ctx->bit_depth - 8); |