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authorRichard Genoud <richard.genoud@bootlin.com>2025-10-28 08:34:58 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-10-28 17:16:01 +0100
commit4a3a05681432c4a3bf9f7af3c813baf33bb143e8 (patch)
tree0653ea4dc3d74ab51c744ebaed002c76e240c5f1 /drivers/mtd
parent94dc08adaf927b8a1d4de606055cf1a9c7256425 (diff)
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mtd: rawnand: sunxi: introduce reg_ecc_err_cnt in sunxi_nfc_caps
The H6/H616 ECC_ERR_CNT register is not at the same offset as the A10/A23 one, so move its offset into sunxi_nfc_caps No functional change. Signed-off-by: Richard Genoud <richard.genoud@bootlin.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/sunxi_nand.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 89115a8f0718..d877c20c203d 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -46,7 +46,8 @@
#define NFC_REG_ECC_CTL 0x0034
#define NFC_REG_ECC_ST 0x0038
#define NFC_REG_DEBUG 0x003C
-#define NFC_REG_ECC_ERR_CNT(x) ((0x0040 + (x)) & ~0x3)
+#define NFC_REG_A10_ECC_ERR_CNT 0x0040
+#define NFC_REG_ECC_ERR_CNT(nfc, x) ((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3)
#define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4))
#define NFC_REG_SPARE_AREA 0x00A0
#define NFC_REG_PAT_ID 0x00A4
@@ -223,6 +224,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
* @has_mdma: Use mbus dma mode, otherwise general dma
* through MBUS on A23/A33 needs extra configuration.
* @reg_io_data: I/O data register
+ * @reg_ecc_err_cnt: ECC error counter register
* @dma_maxburst: DMA maxburst
* @ecc_strengths: Available ECC strengths array
* @nstrengths: Size of @ecc_strengths
@@ -230,6 +232,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
struct sunxi_nfc_caps {
bool has_mdma;
unsigned int reg_io_data;
+ unsigned int reg_ecc_err_cnt;
unsigned int dma_maxburst;
const u8 *ecc_strengths;
unsigned int nstrengths;
@@ -801,7 +804,7 @@ static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
return 0;
}
- tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(step));
+ tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(nfc, step));
return NFC_ECC_ERR_CNT(step, tmp);
}
@@ -2188,6 +2191,7 @@ static const u8 sunxi_ecc_strengths_a10[] = {
static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
.reg_io_data = NFC_REG_A10_IO_DATA,
+ .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.dma_maxburst = 4,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
@@ -2196,6 +2200,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
.has_mdma = true,
.reg_io_data = NFC_REG_A23_IO_DATA,
+ .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.dma_maxburst = 8,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),