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| author | Pali Rohár <pali@kernel.org> | 2021-10-05 20:09:45 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-11-17 09:48:25 +0100 |
| commit | e0269c0c81b8e965050ebe2bc6a6f5e9ec00254e (patch) | |
| tree | d35b6fefe7d671428c8564590eff84405bede943 /drivers/pci | |
| parent | 50b0ce94fbcce22362081ef9ae0fcf0a42e74d02 (diff) | |
| download | linux-e0269c0c81b8e965050ebe2bc6a6f5e9ec00254e.tar.gz linux-e0269c0c81b8e965050ebe2bc6a6f5e9ec00254e.tar.bz2 linux-e0269c0c81b8e965050ebe2bc6a6f5e9ec00254e.zip | |
PCI: aardvark: Do not clear status bits of masked interrupts
commit a7ca6d7fa3c02c032db5440ff392d96c04684c21 upstream.
The PCIE_ISR1_REG says which interrupts are currently set / active,
including those which are masked.
The driver currently reads this register and looks if some unmasked
interrupts are active, and if not, it clears status bits of _all_
interrupts, including the masked ones.
This is incorrect, since, for example, some drivers may poll these bits.
Remove this clearing, and also remove this early return statement
completely, since it does not change functionality in any way.
Link: https://lore.kernel.org/r/20211005180952.6812-7-kabel@kernel.org
Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/pci-aardvark.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 18753fd218a3..bb53fcd63856 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1055,12 +1055,6 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); - if (!isr0_status && !isr1_status) { - advk_writel(pcie, isr0_val, PCIE_ISR0_REG); - advk_writel(pcie, isr1_val, PCIE_ISR1_REG); - return; - } - /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING) advk_pcie_handle_msi(pcie); |