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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-17 12:29:25 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2024-04-18 16:52:00 +0200 |
| commit | fdea114ac26ce0eae4e248e6194d39e4e7536f7a (patch) | |
| tree | 1f5c7dfe08c811060557d66632f1bbb9571dccb8 /drivers/pmdomain/renesas/rcar-sysc.h | |
| parent | c8d87704444a8ac731249ca43b6b2039c2949218 (diff) | |
| download | linux-fdea114ac26ce0eae4e248e6194d39e4e7536f7a.tar.gz linux-fdea114ac26ce0eae4e248e6194d39e4e7536f7a.tar.bz2 linux-fdea114ac26ce0eae4e248e6194d39e4e7536f7a.zip | |
pmdomain: renesas: rcar-sysc: Add R-Car M3-W power-off delay quirk
R-Car M3-W needs a delay of 1 µs before powering off the A3IR and A3VC
power domains. Add support for this using a new flag, which indicates
that a power area is subject to this quirk.
Inspired by a patch in the BSP by Dien Pham.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/ecbc3465c598084c904dd3714e2894463094ed9a.1713348705.git.geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/pmdomain/renesas/rcar-sysc.h')
| -rw-r--r-- | drivers/pmdomain/renesas/rcar-sysc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pmdomain/renesas/rcar-sysc.h b/drivers/pmdomain/renesas/rcar-sysc.h index 8c4ec36ed7da..07ffce310686 100644 --- a/drivers/pmdomain/renesas/rcar-sysc.h +++ b/drivers/pmdomain/renesas/rcar-sysc.h @@ -16,6 +16,7 @@ #define PD_CPU BIT(0) /* Area contains main CPU core */ #define PD_SCU BIT(1) /* Area contains SCU and L2 cache */ #define PD_NO_CR BIT(2) /* Area lacks PWR{ON,OFF}CR registers */ +#define PD_OFF_DELAY BIT(3) /* Area is subject to power-off delay quirk */ #define PD_CPU_CR PD_CPU /* CPU area has CR (R-Car H1) */ #define PD_CPU_NOCR PD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3) */ |