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authorMartin K. Petersen <martin.petersen@oracle.com>2025-02-20 22:11:11 -0500
committerMartin K. Petersen <martin.petersen@oracle.com>2025-02-20 22:11:11 -0500
commit7e72900272b61c11f2fd4020d4f186124d0d171b (patch)
tree12c8ea545f4bd7ceaa1fa01cfd28f78c6370b12a /include/ufs
parent369552fd03f296261023872b8fc983d1fc55c8e9 (diff)
parent6d7696b4d447028315038645f8a47f7539819be8 (diff)
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Merge patch series "Support Multi-frequency scale for UFS"
Ziqi Chen <quic_ziqichen@quicinc.com> says: With OPP V2 enabled, devfreq can scale clocks amongst multiple frequency plans. However, the gear speed is only toggled between min and max during clock scaling. Enable multi-level gear scaling by mapping clock frequencies to gear speeds, so that when devfreq scales clock frequencies we can put the UFS link at the appropraite gear speeds accordingly. This series has been tested on below platforms - sm8550 mtp + UFS3.1 SM8650 MTP + UFS3.1 SM8750 MTP + UFS4.0 Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Link: https://lore.kernel.org/r/20250213080008.2984807-1-quic_ziqichen@quicinc.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'include/ufs')
-rw-r--r--include/ufs/ufshcd.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 34221146410e..39d89619bb26 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -336,6 +336,7 @@ struct ufs_pwr_mode_info {
* @get_outstanding_cqs: called to get outstanding completion queues
* @config_esi: called to config Event Specific Interrupt
* @config_scsi_dev: called to configure SCSI device parameters
+ * @freq_to_gear_speed: called to map clock frequency to the max supported gear speed
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -344,8 +345,8 @@ struct ufs_hba_variant_ops {
void (*exit)(struct ufs_hba *);
u32 (*get_ufs_hci_version)(struct ufs_hba *);
int (*set_dma_mask)(struct ufs_hba *);
- int (*clk_scale_notify)(struct ufs_hba *, bool,
- enum ufs_notify_change_status);
+ int (*clk_scale_notify)(struct ufs_hba *, bool, unsigned long,
+ enum ufs_notify_change_status);
int (*setup_clocks)(struct ufs_hba *, bool,
enum ufs_notify_change_status);
int (*hce_enable_notify)(struct ufs_hba *,
@@ -384,6 +385,7 @@ struct ufs_hba_variant_ops {
unsigned long *ocqs);
int (*config_esi)(struct ufs_hba *hba);
void (*config_scsi_dev)(struct scsi_device *sdev);
+ u32 (*freq_to_gear_speed)(struct ufs_hba *hba, unsigned long freq);
};
/* clock gating state */
@@ -448,6 +450,8 @@ struct ufs_clk_gating {
* one keeps track of previous power mode.
* @target_freq: frequency requested by devfreq framework
* @min_gear: lowest HS gear to scale down to
+ * @wb_gear: enable Write Booster when HS gear scales above or equal to it, else
+ * disable Write Booster
* @is_enabled: tracks if scaling is currently enabled or not, controlled by
* clkscale_enable sysfs node
* @is_allowed: tracks if scaling is currently allowed or not, used to block
@@ -471,6 +475,7 @@ struct ufs_clk_scaling {
struct ufs_pa_layer_attr saved_pwr_info;
unsigned long target_freq;
u32 min_gear;
+ u32 wb_gear;
bool is_enabled;
bool is_allowed;
bool is_initialized;