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| author | Shuming Fan <shumingf@realtek.com> | 2025-10-27 18:33:33 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-12-01 11:46:02 +0100 |
| commit | 7263caac01826a94074b78d295c8edb1bec9ea6f (patch) | |
| tree | de13e579c76d31982a3f011982e6d3967c2ea2c0 /sound | |
| parent | b865da18b6cb878f33b5920693d03f23b9c4d1a3 (diff) | |
| download | linux-7263caac01826a94074b78d295c8edb1bec9ea6f.tar.gz linux-7263caac01826a94074b78d295c8edb1bec9ea6f.tar.bz2 linux-7263caac01826a94074b78d295c8edb1bec9ea6f.zip | |
ASoC: rt721: fix prepare clock stop failed
[ Upstream commit d914ec6f07548f7c13a231a4f526e043e736e82e ]
This patch adds settings to prevent the 'prepare clock stop failed' error.
Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20251027103333.38353-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/rt721-sdca.c | 4 | ||||
| -rw-r--r-- | sound/soc/codecs/rt721-sdca.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt721-sdca.c b/sound/soc/codecs/rt721-sdca.c index a4bd29d7220b..5f7b505d5414 100644 --- a/sound/soc/codecs/rt721-sdca.c +++ b/sound/soc/codecs/rt721-sdca.c @@ -281,6 +281,10 @@ static void rt721_sdca_jack_preset(struct rt721_sdca_priv *rt721) rt_sdca_index_write(rt721->mbq_regmap, RT721_BOOST_CTRL, RT721_BST_4CH_TOP_GATING_CTRL1, 0x002a); regmap_write(rt721->regmap, 0x2f58, 0x07); + + regmap_write(rt721->regmap, 0x2f51, 0x00); + rt_sdca_index_write(rt721->mbq_regmap, RT721_HDA_SDCA_FLOAT, + RT721_MISC_CTL, 0x0004); } static void rt721_sdca_jack_init(struct rt721_sdca_priv *rt721) diff --git a/sound/soc/codecs/rt721-sdca.h b/sound/soc/codecs/rt721-sdca.h index 71fac9cd8739..24ce188562ba 100644 --- a/sound/soc/codecs/rt721-sdca.h +++ b/sound/soc/codecs/rt721-sdca.h @@ -137,6 +137,7 @@ struct rt721_sdca_dmic_kctrl_priv { #define RT721_HDA_LEGACY_UAJ_CTL 0x02 #define RT721_HDA_LEGACY_CTL1 0x05 #define RT721_HDA_LEGACY_RESET_CTL 0x06 +#define RT721_MISC_CTL 0x07 #define RT721_XU_REL_CTRL 0x0c #define RT721_GE_REL_CTRL1 0x0d #define RT721_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e |