diff options
102 files changed, 10579 insertions, 2523 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml index fe6ca4f68bbe..525ebaa93c85 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm A53 PLL Binding +title: Qualcomm A53 PLL clock maintainers: - Bjorn Andersson <andersson@kernel.org> diff --git a/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml index 0e96f693b050..809c34eb7d5a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm A7 PLL Binding +title: Qualcomm A7 PLL clock maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> diff --git a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml index c40a74b5d672..8b8932bd5a92 100644 --- a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs +title: LPASS Always ON Clock Controller on SM8250 SoCs maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> @@ -17,7 +17,7 @@ description: | properties: compatible: - const: qcom,sm8250-lpass-aon + const: qcom,sm8250-lpass-aoncc reg: maxItems: 1 @@ -28,11 +28,13 @@ properties: clocks: items: - description: LPASS Core voting clock + - description: LPASS Audio codec voting clock - description: Glitch Free Mux register clock clock-names: items: - const: core + - const: audio - const: bus required: @@ -50,9 +52,10 @@ examples: #include <dt-bindings/sound/qcom,q6afe.h> clock-controller@3800000 { #clock-cells = <1>; - compatible = "qcom,sm8250-lpass-aon"; + compatible = "qcom,sm8250-lpass-aoncc"; reg = <0x03380000 0x40000>; clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - clock-names = "core", "bus"; + clock-names = "core", "audio", "bus"; }; diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml index 915d76206ad0..cfca888f6014 100644 --- a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs +title: LPASS Audio Clock Controller on SM8250 SoCs maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> @@ -28,11 +28,13 @@ properties: clocks: items: - description: LPASS Core voting clock + - description: LPASS Audio codec voting clock - description: Glitch Free Mux register clock clock-names: items: - const: core + - const: audio - const: bus required: @@ -53,6 +55,7 @@ examples: compatible = "qcom,sm8250-lpass-audiocc"; reg = <0x03300000 0x30000>; clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; - clock-names = "core", "bus"; + clock-names = "core", "audio", "bus"; }; diff --git a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml index 9f239c3960d1..93ec1f598e6e 100644 --- a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml @@ -4,16 +4,16 @@ $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Camera Clock & Reset Controller Binding for SM8250 +title: Qualcomm Camera Clock & Reset Controller on SM8250 maintainers: - Jonathan Marek <jonathan@marek.ca> description: | - Qualcomm camera clock control module which supports the clocks, resets and + Qualcomm camera clock control module provides the clocks, resets and power domains on SM8250. - See also dt-bindings/clock/qcom,camcc-sm8250.h + See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h properties: |