diff options
-rw-r--r-- | Documentation/DocBook/media/v4l/subdev-formats.xml | 426 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/drm/imx/ldb.txt | 62 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/Kconfig | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/dw_hdmi-imx.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/imx-drm-core.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/imx-drm.h | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/imx-ldb.c | 196 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/imx-tve.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/ipuv3-crtc.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/ipuv3-plane.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/ipuv3-plane.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/parallel-display.c | 13 | ||||
-rw-r--r-- | drivers/gpu/ipu-v3/ipu-dc.c | 18 | ||||
-rw-r--r-- | include/uapi/linux/media-bus-format.h | 13 | ||||
-rw-r--r-- | include/video/imx-ipu-v3.h | 2 |
15 files changed, 668 insertions, 128 deletions
diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml index c5ea868e3909..18b71aff48c9 100644 --- a/Documentation/DocBook/media/v4l/subdev-formats.xml +++ b/Documentation/DocBook/media/v4l/subdev-formats.xml @@ -91,7 +91,9 @@ see <xref linkend="colorspaces" />.</entry> <listitem><para>For formats where the total number of bits per pixel is smaller than the number of bus samples per pixel times the bus width, a padding value stating if the bytes are padded in their most high order bits - (PADHI) or low order bits (PADLO).</para></listitem> + (PADHI) or low order bits (PADLO). A "C" prefix is used for component-wise + padding in the most high order bits (CPADHI) or low order bits (CPADLO) + of each separate component.</para></listitem> <listitem><para>For formats where the number of bus samples per pixel is larger than 1, an endianness value stating if the pixel is transferred MSB first (BE) or LSB first (LE).</para></listitem> @@ -192,6 +194,24 @@ see <xref linkend="colorspaces" />.</entry> </row> </thead> <tbody valign="top"> + <row id="MEDIA-BUS-FMT-RGB444-1X12"> + <entry>MEDIA_BUS_FMT_RGB444_1X12</entry> + <entry>0x100e</entry> + <entry></entry> + &dash-ent-20; + <entry>r<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>b<subscript>1</subscript></entry> + <entry>b<subscript>0</subscript></entry> + </row> <row id="MEDIA-BUS-FMT-RGB444-2X8-PADHI-BE"> <entry>MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE</entry> <entry>0x1001</entry> @@ -304,6 +324,28 @@ see <xref linkend="colorspaces" />.</entry> <entry>g<subscript>4</subscript></entry> <entry>g<subscript>3</subscript></entry> </row> + <row id="MEDIA-BUS-FMT-RGB565-1X16"> + <entry>MEDIA_BUS_FMT_RGB565_1X16</entry> + <entry>0x100f</entry> + <entry></entry> + &dash-ent-16; + <entry>r<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + <entry>g<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>b<subscript>1</subscript></entry> + <entry>b<subscript>0</subscript></entry> + </row> <row id="MEDIA-BUS-FMT-BGR565-2X8-BE"> <entry>MEDIA_BUS_FMT_BGR565_2X8_BE</entry> <entry>0x1005</entry> @@ -440,6 +482,96 @@ see <xref linkend="colorspaces" />.</entry> <entry>b<subscript>1</subscript></entry> <entry>b<subscript>0</subscript></entry> </row> + <row id="MEDIA-BUS-FMT-RGB666-1X24_CPADHI"> + <entry>MEDIA_BUS_FMT_RGB666_1X24_CPADHI</entry> + <entry>0x1015</entry> + <entry></entry> + &dash-ent-8; + <entry>0</entry> + <entry>0</entry> + <entry>r<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + <entry>0</entry> + <entry>0</entry> + <entry>g<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + <entry>0</entry> + <entry>0</entry> + <entry>b<subscript>5</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>b<subscript>1</subscript></entry> + <entry>b<subscript>0</subscript></entry> + </row> + <row id="MEDIA-BUS-FMT-BGR888-1X24"> + <entry>MEDIA_BUS_FMT_BGR888_1X24</entry> + <entry>0x1013</entry> + <entry></entry> + &dash-ent-8; + <entry>b<subscript>7</subscript></entry> + <entry>b<subscript>6</subscript></entry> + <entry>b<subscript>5</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>b<subscript>1</subscript></entry> + <entry>b<subscript>0</subscript></entry> + <entry>g<subscript>7</subscript></entry> + <entry>g<subscript>6</subscript></entry> + <entry>g<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + <entry>r<subscript>7</subscript></entry> + <entry>r<subscript>6</subscript></entry> + <entry>r<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + </row> + <row id="MEDIA-BUS-FMT-GBR888-1X24"> + <entry>MEDIA_BUS_FMT_GBR888_1X24</entry> + <entry>0x1014</entry> + <entry></entry> + &dash-ent-8; + <entry>g<subscript>7</subscript></entry> + <entry>g<subscript>6</subscript></entry> + <entry>g<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + <entry>b<subscript>7</subscript></entry> + <entry>b<subscript>6</subscript></entry> + <entry>b<subscript>5</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>b<subscript>1</subscript></entry> + <entry>b<subscript>0</subscript></entry> + <entry>r<subscript>7</subscript></entry> + <entry>r<subscript>6</subscript></entry> + <entry>r<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + </row> <row id="MEDIA-BUS-FMT-RGB888-1X24"> <entry>MEDIA_BUS_FMT_RGB888_1X24</entry> <entry>0x100a</entry> @@ -582,6 +714,261 @@ see <xref linkend="colorspaces" />.</entry> </tbody> </tgroup> </table> + + <para>On LVDS buses, usually each sample is transferred serialized in + seven time slots per pixel clock, on three (18-bit) or four (24-bit) + differential data pairs at the same time. The remaining bits are used for + control signals as defined by SPWG/PSWG/VESA or JEIDA standards. + The 24-bit RGB format serialized in seven time slots on four lanes using + JEIDA defined bit mapping will be named + <constant>MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA</constant>, for example. + </para> + + <table pgwide="0" frame="none" id="v4l2-mbus-pixelcode-rgb-lvds"> + <title>LVDS RGB formats</title> + <tgroup cols="8"> + <colspec colname="id" align="left" /> + <colspec colname="code" align="center" /> + <colspec colname="slot" align="center" /> + <colspec colname="lane" /> + <colspec colnum="5" colname="l03" align="center" /> + <colspec colnum="6" colname="l02" align="center" /> + <colspec colnum="7" colname="l01" align="center" /> + <colspec colnum="8" colname="l00" align="center" /> + <spanspec namest="l03" nameend="l00" spanname="l0" /> + <thead> + <row> + <entry>Identifier</entry> + <entry>Code</entry> + <entry></entry> + <entry></entry> + <entry spanname="l0">Data organization</entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>Timeslot</entry> + <entry>Lane</entry> + <entry>3</entry> + <entry>2</entry> + <entry>1</entry> + <entry>0</entry> + </row> + </thead> + <tbody valign="top"> + <row id="MEDIA-BUS-FMT-RGB666-1X7X3-SPWG"> + <entry>MEDIA_BUS_FMT_RGB666_1X7X3_SPWG</entry> + <entry>0x1010</entry> + <entry>0</entry> + <entry></entry> + <entry>-</entry> + <entry>d</entry> + <entry>b<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>1</entry> + <entry></entry> + <entry>-</entry> + <entry>d</entry> + <entry>b<subscript>0</subscript></entry> + <entry>r<subscript>5</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>2</entry> + <entry></entry> + <entry>-</entry> + <entry>d</entry> + <entry>g<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>3</entry> + <entry></entry> + <entry>-</entry> + <entry>b<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>4</entry> + <entry></entry> + <entry>-</entry> + <entry>b<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>5</entry> + <entry></entry> + <entry>-</entry> + <entry>b<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>6</entry> + <entry></entry> + <entry>-</entry> + <entry>b<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + </row> + <row id="MEDIA-BUS-FMT-RGB888-1X7X4-SPWG"> + <entry>MEDIA_BUS_FMT_RGB888_1X7X4_SPWG</entry> + <entry>0x1011</entry> + <entry>0</entry> + <entry></entry> + <entry>d</entry> + <entry>d</entry> + <entry>b<subscript>1</subscript></entry> + <entry>g<subscript>0</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>1</entry> + <entry></entry> + <entry>b<subscript>7</subscript></entry> + <entry>d</entry> + <entry>b<subscript>0</subscript></entry> + <entry>r<subscript>5</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>2</entry> + <entry></entry> + <entry>b<subscript>6</subscript></entry> + <entry>d</entry> + <entry>g<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>3</entry> + <entry></entry> + <entry>g<subscript>7</subscript></entry> + <entry>b<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>4</entry> + <entry></entry> + <entry>g<subscript>6</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>5</entry> + <entry></entry> + <entry>r<subscript>7</subscript></entry> + <entry>b<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + <entry>r<subscript>1</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>6</entry> + <entry></entry> + <entry>r<subscript>6</subscript></entry> + <entry>b<subscript>2</subscript></entry> + <entry>g<subscript>1</subscript></entry> + <entry>r<subscript>0</subscript></entry> + </row> + <row id="MEDIA-BUS-FMT-RGB888-1X7X4-JEIDA"> + <entry>MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA</entry> + <entry>0x1012</entry> + <entry>0</entry> + <entry></entry> + <entry>d</entry> + <entry>d</entry> + <entry>b<subscript>3</subscript></entry> + <entry>g<subscript>2</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>1</entry> + <entry></entry> + <entry>b<subscript>1</subscript></entry> + <entry>d</entry> + <entry>b<subscript>2</subscript></entry> + <entry>r<subscript>7</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>2</entry> + <entry></entry> + <entry>b<subscript>0</subscript></entry> + <entry>d</entry> + <entry>g<subscript>7</subscript></entry> + <entry>r<subscript>6</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>3</entry> + <entry></entry> + <entry>g<subscript>1</subscript></entry> + <entry>b<subscript>7</subscript></entry> + <entry>g<subscript>6</subscript></entry> + <entry>r<subscript>5</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>4</entry> + <entry></entry> + <entry>g<subscript>0</subscript></entry> + <entry>b<subscript>6</subscript></entry> + <entry>g<subscript>5</subscript></entry> + <entry>r<subscript>4</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>5</entry> + <entry></entry> + <entry>r<subscript>1</subscript></entry> + <entry>b<subscript>5</subscript></entry> + <entry>g<subscript>4</subscript></entry> + <entry>r<subscript>3</subscript></entry> + </row> + <row> + <entry></entry> + <entry></entry> + <entry>6</entry> + <entry></entry> + <entry>r<subscript>0</subscript></entry> + <entry>b<subscript>4</subscript></entry> + <entry>g<subscript>3</subscript></entry> + <entry>r<subscript>2</subscript></entry> + </row> + </tbody> + </tgroup> + </table> </section> <section> @@ -2660,6 +3047,43 @@ see <xref linkend="colorspaces" />.</entry> <entry>u<subscript>1</subscript></entry> <entry>u<subscript>0</subscript></entry> </row> + <row id="MEDIA-BUS-FMT-YUV8-1X24"> + <entry>MEDIA_BUS_FMT_YUV8_1X24</entry> + <entry>0x2024</entry> + <entry></entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>-</entry> + <entry>y<subscript>7</subscript></entry> + <entry>y<subscript>6</subscript></entry> + <entry>y<subscript>5</subscript></entry> + <entry>y<subscript>4</subscript></entry> + <entry>y<subscript>3</subscript></entry> + <entry>y<subscript>2</subscript></entry> + <entry>y<subscript>1</subscript></entry> + <entry>y<subscript>0</subscript></entry> + <entry>u<subscript>7</subscript></entry> + <entry>u<subscript>6</subscript></entry> + <entry>u<subscript>5</subscript></entry> + <entry>u<subscript>4</subscript></entry> + <entry>u<subscript>3</subscript></entry> + <entry>u<subscript>2</subscript></entry> + <entry>u<subscript>1</subscript></entry> + <entry>u<subscript>0</subscript></entry> + <entry>v<subscript>7</subscript></entry> + <entry>v<subscript>6</subscript></entry> + <entry>v<subscript>5</subscript></entry> + <entry>v<subscript>4</subscript></entry> + <entry>v<subscript>3</subscript></entry> + <entry>v<subscript>2</subscript></entry> + <entry>v<subscript>1</subscript></entry> + <entry>v<subscript>0</subscript></entry> + </row> <row id="MEDIA-BUS-FMT-YUV10-1X30"> <entry>MEDIA_BUS_FMT_YUV10_1X30</entry> <entry>0x2016</entry> diff --git a/Documentation/devicetree/bindings/drm/imx/ldb.txt b/Documentation/devicetree/bindings/drm/imx/ldb.txt index 443bcb6134d5..9a21366436f6 100644 --- a/Documentation/devicetree/bindings/drm/imx/ldb.txt +++ b/Documentation/devicetree/bindings/drm/imx/ldb.txt @@ -44,23 +44,30 @@ Optional properties: LVDS Channel ============ -Each LVDS Channel has to contain a display-timings node that describes the -video timings for the connected LVDS display. For detailed information, also -have a look at Documentation/devicetree/bindings/video/display-timing.txt. +Each LVDS Channel has to contain either an of graph link to a panel device node +or a display-timings node that describes the video timings for the connected +LVDS display as well as the fsl,data-mapping and fsl,data-width properties. Required properties: - reg : should be <0> or <1> + - port: Input and output port nodes with endpoint definitions as defined in + Documentation/devicetree/bindings/graph.txt. + On i.MX5, the internal two-input-multiplexer is used. Due to hardware + limitations, only one input port (port@[0,1]) can be used for each channel + (lvds-channel@[0,1], respectively). + On i.MX6, there should be four input ports (port@[0-3]) that correspond + to the four LVDS multiplexer inputs. + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected + to a panel input port. Optionally, the output port can be left out if + display-timings are used instead. + +Optional properties (required if display-timings are used): + - display-timings : A node that describes the display timings as defined in + Documentation/devicetree/bindings/video/display-timing.txt. - fsl,data-mapping : should be "spwg" or "jeida" This describes how the color bits are laid out in the serialized LVDS signal. - fsl,data-width : should be <18> or <24> - - port: A port node with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - On i.MX5, the internal two-input-multiplexer is used. - Due to hardware limitations, only one port (port@[0,1]) - can be used for each channel (lvds-channel@[0,1], respectively) - On i.MX6, there should be four ports (port@[0-3]) that correspond - to the four LVDS multiplexer inputs. example: @@ -73,23 +80,21 @@ ldb: ldb@53fa8008 { #size-cells = <0>; compatible = "fsl,imx53-ldb"; gpr = <&gpr>; - clocks = <&clks 122>, <&clks 120>, - <&clks 115>, <&clks 116>, - <&clks 123>, <&clks 85>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; clock-names = "di0_pll", "di1_pll", "di0_sel", "di1_sel", "di0", "di1"; + /* Using an of-graph endpoint link to connect the panel */ lvds-channel@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - - display-timings { - /* ... */ - }; port@0 { reg = <0>; @@ -98,8 +103,17 @@ ldb: ldb@53fa8008 { remote-endpoint = <&ipu_di0_lvds0>; }; }; + + port@2 { + reg = <2>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; }; + /* Using display-timings and fsl,data-mapping/width instead */ lvds-channel@1 { #address-cells = <1>; #size-cells = <0>; @@ -120,3 +134,13 @@ ldb: ldb@53fa8008 { }; }; }; + +panel: lvds-panel { + /* ... */ + + port { + panel_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; +}; diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig index 33cdddf26684..2b81a417cf29 100644 --- a/drivers/gpu/drm/imx/Kconfig +++ b/drivers/gpu/drm/imx/Kconfig @@ -36,6 +36,7 @@ config DRM_IMX_TVE config DRM_IMX_LDB tristate "Support for LVDS displays" depends on DRM_IMX && MFD_SYSCON + select DRM_PANEL help Choose this to enable the internal LVDS Display Bridge (LDB) found on i.MX53 and i.MX6 processors. diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c index 87fe8ed92ebe..1834ac8998cc 100644 --- a/drivers/gpu/drm/imx/dw_hdmi-imx.c +++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c @@ -123,7 +123,7 @@ static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder) static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder) { - imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24); + imx_drm_set_bus_format(encoder, MEDIA_BUS_FMT_RGB888_1X24); } static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = { diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index db2f5a739e05..74f505b0dd02 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c @@ -103,8 +103,8 @@ static struct imx_drm_crtc *imx_drm_find_crtc(struct drm_crtc *crtc) return NULL; } -int imx_drm_panel_format_pins(struct drm_encoder *encoder, - u32 interface_pix_fmt, int hsync_pin, int vsync_pin) +int imx_drm_set_bus_format_pins(struct drm_encoder *encoder, u32 bus_format, + int hsync_pin, int vsync_pin) { struct imx_drm_crtc_helper_funcs *helper; struct imx_drm_crtc *imx_crtc; @@ -116,16 +116,16 @@ int imx_drm_panel_format_pins(struct drm_encoder *encoder, helper = &imx_crtc->imx_drm_helper_funcs; if (helper->set_interface_pix_fmt) return helper->set_interface_pix_fmt(encoder->crtc, - interface_pix_fmt, hsync_pin, vsync_pin); + bus_format, hsync_pin, vsync_pin); return 0; } -EXPORT_SYMBOL_GPL(imx_drm_panel_format_pins); +EXPORT_SYMBOL_GPL(imx_drm_set_bus_format_pins); -int imx_drm_panel_format(struct drm_encoder *encoder, u32 interface_pix_fmt) +int imx_drm_set_bus_format(struct drm_encoder *encoder, u32 bus_format) { - return imx_drm_panel_format_pins(encoder, interface_pix_fmt, 2, 3); + return imx_drm_set_bus_format_pins(encoder, bus_format, 2, 3); } -EXPORT_SYMBOL_GPL(imx_drm_panel_format); +EXPORT_SYMBOL_GPL(imx_drm_set_bus_format); int imx_drm_crtc_vblank_get(struct imx_drm_crtc *imx_drm_crtc) { diff --git a/drivers/gpu/drm/imx/imx-drm.h b/drivers/gpu/drm/imx/imx-drm.h index 3c559ccd6af0..28e776d8d9d2 100644 --- a/drivers/gpu/drm/imx/imx-drm.h +++ b/drivers/gpu/drm/imx/imx-drm.h @@ -18,7 +18,7 @@ struct imx_drm_crtc_helper_funcs { int (*enable_vblank)(struct drm_crtc *crtc); void (*disable_vblank)(struct drm_crtc *crtc); int (*set_interface_pix_fmt)(struct drm_crtc *crtc, - u32 pix_fmt, int hsync_pin, int vsync_pin); + u32 bus_format, int hsync_pin, int vsync_pin); const struct drm_crtc_helper_funcs *crtc_helper_funcs; const struct drm_crtc_funcs *crtc_funcs; }; @@ -40,10 +40,10 @@ void imx_drm_mode_config_init(struct drm_device *drm); struct drm_gem_cma_object *imx_drm_fb_get_obj(struct drm_framebuffer *fb); -int imx_drm_panel_format_pins(struct drm_encoder *encoder, - u32 interface_pix_fmt, int hsync_pin, int vsync_pin); -int imx_drm_panel_format(struct drm_encoder *encoder, - u32 interface_pix_fmt); +int imx_drm_set_bus_format_pins(struct drm_encoder *encoder, + u32 bus_format, int hsync_pin, int vsync_pin); +int imx_drm_set_bus_format(struct drm_encoder *encoder, + u32 bus_format); int imx_drm_encoder_get_mux_id(struct device_node *node, struct drm_encoder *encoder); diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index 2d6dc94e1e64..abacc8f67469 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c @@ -19,10 +19,11 @@ #include <drm/drmP.h> #include <drm/drm_fb_helper.h> #include <drm/drm_crtc_helper.h> +#include <drm/drm_panel.h> #include <linux/mfd/syscon.h> #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> -#include <linux/of_address.h> #include <linux/of_device.h> +#include <linux/of_graph.h> #include <video/of_videomode.h> #include <linux/regmap.h> #include <linux/videodev2.h> @@ -55,12 +56,14 @@ struct imx_ldb_channel { struct imx_ldb *ldb; struct drm_connector connector; struct drm_encoder encoder; + struct drm_panel *panel; struct device_node *child; int chno; void *edid; int edid_len; struct drm_display_mode mode; int mode_valid; + int bus_format; }; struct bus_mux { @@ -75,6 +78,7 @@ struct imx_ldb { struct imx_ldb_channel channel[2]; struct clk *clk[2]; /* our own clock */ struct clk *clk_sel[4]; /* parent of display clock */ + struct clk *clk_parent[4]; /* original parent of clk_sel */ struct clk *clk_pll[2]; /* upstream clock we can adjust */ u32 ldb_ctrl; const struct bus_mux *lvds_mux; @@ -91,6 +95,17 @@ static int imx_ldb_connector_get_modes(struct drm_connector *connector) struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector); int num_modes = 0; + if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs && + imx_ldb_ch->panel->funcs->get_modes) { + struct drm_display_info *di = &connector->display_info; + + num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel); + if (!imx_ldb_ch->bus_format && di->num_bus_formats) + imx_ldb_ch->bus_format = di->bus_formats[0]; + if (num_modes > 0) + return num_modes; + } + if (imx_ldb_ch->edid) { drm_mode_connector_update_edid_property(connector, imx_ldb_ch->edid); @@ -163,24 +178,36 @@ static void imx_ldb_encoder_prepare(struct drm_encoder *encoder) { struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder); struct imx_ldb *ldb = imx_ldb_ch->ldb; - u32 pixel_fmt; + int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; + u32 bus_format; - switch (imx_ldb_ch->chno) { - case 0: - pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ? - V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666; + switch (imx_ldb_ch->bus_format) { + default: + dev_warn(ldb->dev, + "could not determine data mapping, default to 18-bit \"spwg\"\n"); + /* fallthrough */ + case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG: + bus_format = MEDIA_BUS_FMT_RGB666_1X18; break; - case 1: - pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ? - V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666; + case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG: + bus_format = MEDIA_BUS_FMT_RGB888_1X24; + if (imx_ldb_ch->chno == 0 || dual) + ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24; + if (imx_ldb_ch->chno == 1 || dual) + ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24; + break; + case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA: + bus_format = MEDIA_BUS_FMT_RGB888_1X24; + if (imx_ldb_ch->chno == 0 || dual) + ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 | + LDB_BIT_MAP_CH0_JEIDA; + if (imx_ldb_ch->chno == 1 || dual) + ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 | |